MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 385

• Manufacturer Part Number: MC68HC908LK24
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

18.4.2 Data Direction Register B (DDRB)
MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
NOTE:
Address:
Data direction register B determines whether each port B pin is an input
or an output. Writing a logic 1 to a DDRB bit enables the output buffer for
the corresponding port B pin; a logic 0 disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
the port B I/O logic.
When DDRBx is a logic 1, reading address $0001 reads the PTBx data
latch. When DDRBx is a logic 0, reading address $0001 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
Reset:
Read:
Write:
These read/write bits control port B data direction. Reset clears
DDRB[7:0], configuring all port B pins as inputs.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
DDRB7
READ DDRB ($0005)
WRITE DDRB ($0005)
WRITE PTB ($0001)
READ PTB ($0001)
$0005
Bit 7
0
Figure 18-6. Data Direction Register B (DDRB)
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Input/Output (I/O) Ports
DDRB6
6
0
Figure 18-7. Port B I/O Circuit
RESET
DDRB5
5
0
DDRB4
DDRBx
PTBx
4
0
DDRB3
3
0
DDRB2
2
0
Figure 18-7
Input/Output (I/O) Ports
DDRB1
1
0
Data Sheet
shows
DDRB0
Bit 0
Port B
0
PTBx
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