MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 131
MC68HC908LK24
Manufacturer Part Number
MC68HC908LK24
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908LK24.pdf
(465 pages)
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8.6.4 PLL VCO Range Select Register
MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
NOTE:
Address:
The PLL VCO range select register (PMRS) contains the programming
information required for the hardware configuration of the VCO.
VRS[7:0] — VCO Range Select Bits
The VCO range select bits have built-in protection such that they cannot
be written when the PLL is on (PLLON = 1) and such that the VCO clock
cannot be selected as the source of the base clock (BCS = 1) if the VCO
range select bits are all clear.
The PLL VCO range select register must be programmed correctly.
Incorrect programming can result in failure of the PLL to achieve lock.
Reset:
Read:
Write:
These read/write bits control the hardware center-of-range linear
multiplier L which, in conjunction with E (See
8.4.6 Programming the
controls the hardware center-of-range frequency, f
cannot be written when the PLLON bit in the PCTL is set. (See
Special Programming
range select register disables the PLL and clears the BCS bit in the
PLL control register (PCTL). (See
and
register to $40 for a default range multiply value of 64.
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 8-8. PLL VCO Range Select Register (PMRS)
8.4.7 Special Programming
$003A
VRS7
Bit 7
0
Clock Generator Module (CGM)
Go to: www.freescale.com
VRS6
6
1
VRS5
5
0
Exceptions.) A value of $00 in the VCO
PLL, and
VRS4
4
0
8.4.8 Base Clock Selector Circuit
Exceptions.). Reset initializes the
8.6.1 PLL Control
VRS3
3
0
Clock Generator Module (CGM)
8.4.3 PLL
VRS2
2
0
VRS
. VRS[7:0]
Register.),
VRS1
CGM Registers
Circuits,
1
0
Data Sheet
VRS0
Bit 0
8.4.7
0
131
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