MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 356
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MC68HC908LK24
Manufacturer Part Number
MC68HC908LK24
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908LK24.pdf
(465 pages)
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Liquid Crystal Display (LCD) Driver
17.5.4 Fast Charge and Low Current
Data Sheet
356
The LCD cycle frame is determined by the equation:
For example, for 1/3 duty and 256Hz waveform base clock:
The default value for each of the bias resistors (see
in the resistor ladder is approximately 37kΩ at V
high current drain through the 37kΩ resistor ladder may not be suitable
for some LCD panel connections. Lowering this current is possible by
setting the LC bit in the LCD control register, switching the R
to 146kΩ.
Although the lower current drain is desirable, but in some LCD panel
connections, the higher current is required to drive the capacitive load of
the LCD panel. In most cases, the higher current is only required when
the LCD waveforms change state (the rising and falling edges in the LCD
output waveforms). The fast charge option is designed to have the high
current for the switching and the low current for the steady state. Setting
the FC bit in the LCD control register selects the fast charge option. The
R
LCD waveform switching edge, and then back to 146kΩ for the steady
state period. The duration of the fast charge time is set by configuring the
FCCTL[1:0] bits in the LCD clock register, and can be LCDCLK/32,
LCDCLK/64, or LCDCLK/128.
relative to the BP0 waveform.
LCD
Freescale Semiconductor, Inc.
For More Information On This Product,
value is set to 37kΩ (for high current) for a fraction of time for each
LCD CYCLE FRAME =
LCD CYCLE FRAME =
Liquid Crystal Display (LCD) Driver
Go to: www.freescale.com
= 11.72 ms
LCD WAVEFORM BASE CLOCK × DUTY
256 × (1/3)
Figure 17-4
1
shows the fast charge clock
MC68HC908LJ24/LK24 — Rev. 2
1
LCD
Figure
= 3V. The relatively
17-3), R
LCD
MOTOROLA
value
LCD
,
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