MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 326

• Manufacturer Part Number: MC68HC908LK24
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Multi-Master IIC Interface (MMIIC)
15.5.4 Multi-Master IIC Status Register (MMSR)
Data Sheet
326
Address:
MMRXIF — Multi-Master IIC Receive Interrupt Flag
Reset:
Read: MMRXIF
Write:
Freescale Semiconductor, Inc.
This flag is set after the data receive register (MMDRR) is loaded with
a new received data. Once the MMDRR is loaded with received data,
no more received data can be loaded to the MMDRR register until the
CPU reads the data from the MMDRR to clear MMRXBF flag.
MMRXIF generates an interrupt request to CPU if the MMIEN bit in
MMCR is also set. This bit is cleared by writing "0" to it or by reset; or
when the MMEN = 0.
For More Information On This Product,
1 = New data in data receive register (MMDRR)
0 = No data received
Figure 15-5. Multi-Master IIC Status Register (MMSR)
$006D
MMBR2
Bit 7
Multi-Master IIC Interface (MMIIC)
0
0
0
0
0
0
1
1
1
1
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= Unimplemented
MMTXIF MMATCH MMSRW MMRXAK
6
0
0
MMBR1
Table 15-2. Baud Rate Select
0
0
1
1
0
0
1
1
5
0
MMBR0
0
1
0
1
0
1
0
1
4
0
Internal bus clock ÷ 8
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
Internal bus clock ÷ 128
Internal bus clock ÷ 256
Internal bus clock ÷ 512
Internal bus clock ÷ 1024
3
1
MC68HC908LJ24/LK24 — Rev. 2
Baud Rate
2
0
0
MMTXBE MMRXBF
1
1
MOTOROLA
Bit 0
0