MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 416

• Manufacturer Part Number: MC68HC908LK24
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Computer Operating Properly (COP)
21.3 Functional Description
Data Sheet
416
INTERNAL RESET SOURCES
(COPRS FROM CONFIG1)
(COPD FROM CONFIG1)
RESET VECTOR FETCH
STOP INSTRUCTION
COPEN (FROM SIM)
NOTE:
COPCTL WRITE
COPCTL WRITE
COP RATE SEL
COP DISABLE
RESET
ICLK
Figure 21-1
The COP counter is a free-running 6-bit counter preceded by a 12-bit
prescaler counter. If not cleared by software, the COP counter overflows
and generates an asynchronous reset after 2
cycles, depending on the state of the COP rate select bit, COPRS, in the
CONFIG1 register. With a 2
ICLK gives a COP timeout period of 174ms. Writing any value to location
$FFFF before an overflow occurs prevents a COP reset by clearing the
COP counter and stages 12 through 5 of the prescaler.
Service the COP immediately after reset and before entering or after
exiting STOP Mode to guarantee the maximum time before the first COP
counter overflow.
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 21-1. COP Block Diagram
Computer Operating Properly (COP)
12-BIT COP PRESCALER
Go to: www.freescale.com
shows the structure of the COP module.
COP CLOCK
COP COUNTER
6-BIT COP COUNTER
CLEAR
13
– 2
4
ICLK cycle overflow option, a 47-kHz
MC68HC908LJ24/LK24 — Rev. 2
RESET STATUS REGISTER
18
– 2
RESET CIRCUIT
4
or 2
13
– 2
MOTOROLA
4
ICLK