MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 337

no-image

MC68HC908LK24

Manufacturer Part Number
MC68HC908LK24
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908LK24CFQ
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68HC908LK24CFQ
Manufacturer:
FRE/MOT
Quantity:
20 000
Part Number:
MC68HC908LK24CFU
Manufacturer:
FREESCALE Semiconductor
Quantity:
489
Part Number:
MC68HC908LK24CFU
Manufacturer:
FREESCALE
Quantity:
300
Part Number:
MC68HC908LK24CFU
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68HC908LK24CFU
Manufacturer:
FREESCALE
Quantity:
300
Part Number:
MC68HC908LK24CFU
Manufacturer:
FREESCALE
Quantity:
168
Part Number:
MC68HC908LK24CPK
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
16.4.2 Voltage Conversion
16.4.3 Conversion Time
MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
NOTE:
NOTE:
When the input voltage to the ADC equals V
signal to $3FF (full scale). If the input voltage equals V
converts it to $000. Input voltages between V
straight-line linear conversions. All other input voltages will result in
$3FF if greater than V
Input voltage should not exceed the analog supply voltages.
Conversion starts after a write to the ADSCR. A conversion is between
16 and 17 ADC clock cycles, therefore:
The ADC conversion time is determined by the clock source chosen and
the divide ratio selected. The clock source is either the bus clock or
CGMXCLK and is selectable by the ADICLK bit located in the ADC clock
control register. The divide ratio is selected by the ADIV[2:0] bits.
For example, if a 4MHz CGMXCLK is selected as the ADC input clock
source, with a divide-by-2 prescale, and the bus speed is set at 8MHz:
The ADC frequency must be between f
maximum to meet ADC specifications. See
Characteristics
Since an ADC cycle may be comprised of several bus cycles (eight in the
previous example) and the start of a conversion is initiated by a bus cycle
write to the ADSCR, from zero to four additional bus cycles may occur
before the start of the initial ADC cycle. This results in a fractional ADC
cycle and is represented as the 17th cycle.
Freescale Semiconductor, Inc.
Number of bus cycles = conversion time × bus frequency
Number of bus cycles = 8µs x 8MHz = 64 to 68 cycles
For More Information On This Product,
Analog-to-Digital Converter (ADC)
Conversion time =
Conversion time =
Go to: www.freescale.com
and
24.13 3.3V ADC Electrical
REFH
and $000 if less than V
16 to 17 ADC cycles
16 to17 ADC cycles
ADC frequency
4MHz ÷ 2
ADIC
Analog-to-Digital Converter (ADC)
REFH
24.12 5V ADC Electrical
minimum and f
REFH
, the ADC converts the
Characteristics.
REFL
and V
Functional Descriptions
= 8 to 8.5 µs
REFL
.
REFL
ADIC
, the ADC
are
Data Sheet
337

Related parts for MC68HC908LK24