MPC8313EZQADDC Freescale Semiconductor, MPC8313EZQADDC Datasheet - Page 188
MPC8313EZQADDC
Manufacturer Part Number
MPC8313EZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB W/ENC
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313EZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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Reset, Clocking, and Initialization
4.3.3.1.1
The device will use GPCM to load the reset configuration from EEPROM or NOR Flash. The device will
read 64 bytes in this case. The local bus controller’s registers setting will be set according to
The device will use FCM to load the reset configuration from NAND Flash. The device will read 512 bytes
if small size NAND Flash is used, or 2048 bytes if large page NAND Flash is used. The local bus
controller’s registers setting will be set according to
The device will use PCI_SYNC_IN clock to generate the internal LCLK, which will run at half the
frequency of PCI_SYNC_IN.
4-22
CFG_RESET_SOURCE
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
0000
0001
0101
EEPROM Address
Table 4-21. Local Bus Reset Configuration Words Data Structure (continued)
Local Bus Controller Setting
0x1C
0x2C
0x3C
0x10
0x14
0x18
0x20
0x24
0x28
0x30
0x34
0x38
Table 4-22. Local Bus Controller Setting When Loading RCW
NOR Flash
NAND Flash, 8 bit,
small page
NAND Flash, 8 bit,
large page
Meaning
RCWH[16:23]
RCWH[24:31]
RCWL[16:23]
RCWL[24:31]
RCWH[8:15]
RCWH[0:7]
[0:7]
BR0[PS]
10
01
01
Table
[8:15]
EEPROM Data Bits
4-22.
BR0[MSEL]
000
001
001
[16:23]
OR0[SCY]
1111
0010
0010
[24:31]
Freescale Semiconductor
OR0[PGS]
NA
Table
0
1
4-22.
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