MPC8313EZQADDC Freescale Semiconductor, MPC8313EZQADDC Datasheet - Page 5
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MPC8313EZQADDC
Manufacturer Part Number
MPC8313EZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB W/ENC
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313EZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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Paragraph
Number
4.3.2.2.5
4.3.2.2.6
4.3.2.2.7
4.3.2.2.8
4.3.3
4.3.3.1
4.3.3.1.1
4.3.3.2
4.3.3.2.1
4.3.3.2.2
4.3.3.2.3
4.3.3.2.4
4.3.3.3
4.3.3.3.1
4.4
4.4.1
4.4.1.1
4.4.2
4.4.3
4.4.4
4.4.5
4.4.6
4.5
4.5.1
4.5.1.1
4.5.1.2
4.5.1.3
4.5.1.4
4.5.1.5
4.5.1.6
4.5.1.7
4.5.2
4.5.2.1
4.5.2.2
4.5.2.3
5.1
5.2
Freescale Semiconductor
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Clocking ........................................................................................................................ 4-28
Memory Map/Register Definitions ................................................................................ 4-32
Introduction...................................................................................................................... 5-1
Local Memory Map Overview and Example .................................................................. 5-1
Loading the Reset Configuration Words ................................................................... 4-21
Clocking in PCI Host Mode....................................................................................... 4-30
Clocking In PCI Agent Mode .................................................................................... 4-30
System Clock Domains.............................................................................................. 4-30
USB Clocking ............................................................................................................ 4-31
Ethernet Clocking ...................................................................................................... 4-32
Real-Time Clock (RTC)............................................................................................. 4-32
Reset Configuration Register Descriptions................................................................ 4-32
Clock Configuration Registers................................................................................... 4-37
Loading from Local Bus........................................................................................ 4-21
Loading from I2C EEPROM ................................................................................. 4-23
Default Reset Configuration Words....................................................................... 4-26
PCI Clock Outputs (PCI_CLK_OUT[0:2]) ........................................................... 4-30
Reset Configuration Word Low Register (RCWLR)............................................. 4-33
Reset Configuration Word High Register (RCWHR)............................................ 4-33
Reset Status Register (RSR) .................................................................................. 4-33
Reset Mode Register (RMR) ................................................................................. 4-35
Reset Protection Register (RPR) ........................................................................... 4-35
Reset Control Register (RCR) ............................................................................... 4-36
Reset Control Enable Register (RCER)................................................................. 4-37
System PLL Mode Register (SPMR) .................................................................... 4-37
Output Clock Control Register (OCCR)................................................................ 4-39
System Clock Control Register (SCCR)................................................................ 4-40
eTSEC1 Mode ................................................................................................... 4-19
eTSEC2 Mode ................................................................................................... 4-20
e300 Core True Little-Endian ............................................................................ 4-20
LALE Configuration.......................................................................................... 4-21
Local Bus Controller Setting ............................................................................. 4-22
Using the Boot Sequencer Reset Configuration ................................................ 4-23
EEPROM Calling Address ................................................................................ 4-23
EEPROM Data Format in Reset Configuration Mode ...................................... 4-23
Reset Configuration Load Fail .......................................................................... 4-25
Examples for Hard-Coded Reset Configuration Words Usage ......................... 4-27
System Configuration
Contents
Chapter 5
Title
Number
Page
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