ADP1046DC1-EVALZ Analog Devices, ADP1046DC1-EVALZ Datasheet - Page 25

no-image

ADP1046DC1-EVALZ

Manufacturer Part Number
ADP1046DC1-EVALZ
Description
Daughter Cards & OEM Boards ADP1046 Daughter Card
Manufacturer
Analog Devices
Series
ADP1046r
Datasheet

Specifications of ADP1046DC1-EVALZ

Rohs
yes
Product
Daughter Cards
Description/function
100 kHz daughter board
Interface Type
I2C
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3.3 V
Factory Pack Quantity
1
For Use With
ADP1046
Data Sheet
CURRENT SHARING (SHARE)
The
digital current sharing. The
information for current sharing (this setting is programmed
in Register 0x29[4]).
Analog Current Sharing
Analog current sharing uses the internal current sensing
circuitry to provide a current reading to an external current
error amplifier. Therefore, an additional differential current
amplifier is not necessary.
The current reading from CS2 can be output to the SHAREo
pin in the form of a digital bit stream, which is the output of the
current sense ADC (see Figure 32). The bit stream from the
sigma-delta ADC is proportional to the current delivered by
this unit to the load. By filtering this digital bit stream using an
external RC filter, the current information is turned into an
analog voltage that is proportional to the current delivered by
this unit to the load. This voltage can be compared to the share
bus voltage. If the unit is not supplying enough current, an error
signal can be applied to the VS3± feedback point. This signal
causes the unit to increase its output voltage and, in turn, its
current contribution to the load.
Digital Share Bus
The digital share bus scheme is similar in principle to the tradi-
tional analog share bus scheme. The difference is that instead of
using a voltage on the share bus to represent current, a digital
word is used.
The
digital word is a function of the current that the power supply is
providing (the higher the current, the larger the digital word).
The power supply with the highest current controls the bus
(master). A power supply that is putting out less current (slave)
sees that another supply is providing more power to the load
than it is.
ADP1046
ADP1046
supports both analog current sharing and
outputs a digital word onto the share bus. The
PREVIOUS
2 STOP BITS
FRAME
ADP1046
(IDLE)
CS2+
CURRENT
CURRENT
SENSE
START BIT
ADC
uses the CS2 current
0
CS2–
Figure 33. Digital Current Share Frame Timing Diagram
BIT STREAM
Figure 32. Analog Current Share Configuration
SHARE
BUS
Rev. B | Page 25 of 92
8-BIT DATA
FRAME
SHAREo
During the next cycle, the slave increases its current output contri-
bution by increasing its output voltage. This cycle continues
until the slave outputs the same current as the master, within
a programmable tolerance range. Figure 31 shows the configu-
ration of the digital share bus.
The digital share bus is based on a single-wire communication
bus principle; that is, the clock and data signals are contained
together.
When two or more
chronize their share bus timing. This synchronization is performed
by the start bit at the beginning of a communications frame. If a
new
the device waits to begin sharing until the next frame. The new
ADP1046
designates the end of a share frame. It then performs synchroni-
zation with the other
The digital share bus frame is shown in Figure 33.
BIT STREAM
ADP1046
CURRENT SENSE
CURRENT SENSE
POWER SUPPLY A
POWER SUPPLY B
monitors the share bus until it sees a stop bit, which
INFO
INFO
Figure 31. Digital Current Share Configuration
is hot-swapped onto an existing digital share bus,
2 STOP BITS
LPF
(IDLE)
ADP1046
ADP1046
VOLTAGE
DIGITAL
DIGITAL
WORD
WORD
START BIT
NEXT FRAME
devices are connected, they syn-
0
devices during the next start bit.
SHAREo
SHAREo
SHAREi
SHAREi
ADP1046
SHARE
BUS
V
DD

Related parts for ADP1046DC1-EVALZ