ADP1046DC1-EVALZ Analog Devices, ADP1046DC1-EVALZ Datasheet - Page 46

• Manufacturer Part Number: ADP1046DC1-EVALZ
• Description: Daughter Cards & OEM Boards ADP1046 Daughter Card
• Manufacturer: Analog Devices
• Series: ADP1046r

Specifications of ADP1046DC1-EVALZ

• Rohs: yes
• Product: Daughter Cards
• Description/function: 100 kHz daughter board
• Interface Type: I2C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V
• Factory Pack Quantity: 1
• For Use With: ADP1046

Address
0x2F
0x30
Voltage Sense Registers
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
0x3B
ID Registers
0x3C
0x3D
0x3E
PWM and Synchronous Rectification Timing Registers
0x3F
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
0x5C
0x5D
0x5E
ADP1046
Register Name
OTP threshold
OrFET
VS3 voltage setting (remote voltage)
VS1 overvoltage limit (OVP)
VS2 and VS3 overvoltage limit (OVP)
VS1 undervoltage limit (UVP)
Line impedance limit
Load line impedance
Fast OVP comparator
VS1 trim
VS2 trim
VS3 trim
Light load mode disable settings
Silicon revision ID
Manufacturer ID
Device ID
OUTAUX switching frequency setting
PWM switching frequency setting and PWM switching frequency setting in resonant mode
OUTA rising edge timing (OUTA pin) and OUTA rising edge dead time in resonant mode
OUTA rising edge setting (OUTA pin) and lowest switching frequency limit setting in resonant mode
OUTA falling edge timing (OUTA pin) and OUTA falling edge dead time in resonant mode
OUTA falling edge setting (OUTA pin) and lowest switching frequency limit setting in resonant mode
OUTB rising edge timing (OUTB pin) and OUTB rising edge dead time in resonant mode
OUTB rising edge setting (OUTB pin) and highest switching frequency limit setting in resonant mode
OUTB falling edge timing (OUTB pin) and OUTB falling edge dead time in resonant mode
OUTB falling edge setting (OUTB pin) and highest switching frequency limit setting in resonant mode
OUTC rising edge timing (OUTC pin) and OUTC rising edge dead time in resonant mode
OUTC rising edge setting (OUTC pin) and burst mode operation in resonant mode
OUTC falling edge timing (OUTC pin) and OUTC falling edge dead time in resonant mode
OUTC falling edge setting (OUTC pin)
OUTD rising edge timing (OUTD pin) and OUTD rising edge dead time in resonant mode
OUTD rising edge setting (OUTD pin)
OUTD falling edge timing (OUTD pin) and OUTD falling edge dead time in resonant mode
OUTD falling edge setting (OUTD pin)
SR1 rising edge timing (SR1 pin) and SR1 rising edge dead time in resonant mode
SR1 rising edge setting (SR1 pin)
SR1 falling edge timing (SR1 pin) and SR1 falling edge dead time in resonant mode
SR1 falling edge setting (SR1 pin)
SR2 rising edge timing (SR2 pin) and SR2 rising edge dead time in resonant mode
SR2 rising edge setting (SR2 pin)
SR2 falling edge timing (SR2 pin) and SR2 falling edge dead time in resonant mode
SR2 falling edge setting (SR2 pin)
OUTAUX rising edge timing (OUTAUX pin)
OUTAUX rising edge setting (OUTAUX pin)
OUTAUX falling edge timing (OUTAUX pin)
OUTAUX falling edge setting (OUTAUX pin)
OUTx and SRx pin disable settings
ACSNS gain trim
Rev. B | Page 46 of 92
Data Sheet