ADP1046DC1-EVALZ Analog Devices, ADP1046DC1-EVALZ Datasheet - Page 38

• Manufacturer Part Number: ADP1046DC1-EVALZ
• Description: Daughter Cards & OEM Boards ADP1046 Daughter Card
• Manufacturer: Analog Devices
• Series: ADP1046r

Specifications of ADP1046DC1-EVALZ

• Rohs: yes
• Product: Daughter Cards
• Description/function: 100 kHz daughter board
• Interface Type: I2C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V
• Factory Pack Quantity: 1
• For Use With: ADP1046

Command Overview
Data transfer using the I
All commands start with a slave address with the R/ W bit cleared
(set to 0), followed by the command code (register address). All
commands supported by the
types shown in Figure 46 to Figure 52.
ADP1046
S
S
S
S 7-BIT SLAVE
S
S
= MASTER-TO-SLAVE
= SLAVE-TO-MASTER
= MASTER-TO-SLAVE
= SLAVE-TO-MASTER
= MASTER-TO-SLAVE
= SLAVE-TO-MASTER
= MASTER-TO-SLAVE
= SLAVE-TO-MASTER
= MASTER-TO-SLAVE
= SLAVE-TO-MASTER
= MASTER-TO-SLAVE
= SLAVE-TO-MASTER
7-BIT SLAVE
DATA BYTE LOW
ADDRESS
ADDRESS
DATA BYTE 1
DATA BYTE
7-BIT SLAVE
ADDRESS
W
W
W
W
A
W
Figure 48. Write Word Protocol
Figure 50. Read Word Protocol
Figure 51. Block Write Protocol
A
A
Figure 47. Write Byte Protocol
Figure 49. Read Byte Protocol
Figure 46. Send Byte Protocol
COMMAND
A
A
A
A
CODE
NA
COMMAND
COMMAND
2
C slave is established using commands.
W
CODE
CODE
COMMAND
DATA BYTE HIGH
...
COMMAND
P
ADP1046
CODE
CODE
A
DATA BYTE N
A
COMMAND CODE
A
A
DATA
BYTE
LOW
follow one of the protocol
A
Sr
Sr
A
A
NA
DATA
BYTE
COUNT = N
BYTE
DATA
HIGH
BYTE
A
P
P
A
R
R
A
A
P
P
A
A
A
P
Rev. B | Page 38 of 92
Clock Generation and Stretching
The
the device never needs to generate the clock, which is done by
the master device in the system. However, the I
capable of clock stretching to put the master in a wait state. By
stretching the SCL signal during the low period, the slave device
communicates to the master device that it is not ready and that
the master device must wait.
Conditions where the I
include the following:
•
•
•
Note that the slave device can stretch the SCL line only during
the low period. Also, whereas the I
stretching of the SCL line, the
time that the SCL line can be stretched, or held low. For more
information about the maximum time, see the Timeout
Condition section.
Start and Stop Conditions
Start and stop conditions involve serial data transitions while the
serial clock is at a logic high level. The I
the SDA and SCL lines to detect the start and stop conditions
and transition its internal state machine accordingly. Typical
start and stop conditions are shown in Figure 53.
SDA
SCL
S
= MASTER-TO-SLAVE
= SLAVE-TO-MASTER
ADP1046
The master device is transmitting at a higher baud rate
than the slave device.
The receive FIFO buffer of the slave device is full and must
be read before continuing. This prevents a data overflow
condition.
The slave device is not ready to send data that the master
has requested.
START
COUNT = N
BYTE
is always a slave in the overall system; therefore,
W
Figure 53. Start and Stop Transitions
A
Figure 52. Block Read Protocol
A
BYTE 1
2
DATA
C slave device stretches the SCL line low
COMMAND
CODE
ADP1046
A
2
C specification allows indefinite
A
...
2
Sr
C slave device monitors
limits the maximum
BYTE N
DATA
Data Sheet
2
C slave device is
NA
R
STOP
A
P