ADP1046DC1-EVALZ Analog Devices, ADP1046DC1-EVALZ Datasheet - Page 77

• Manufacturer Part Number: ADP1046DC1-EVALZ
• Description: Daughter Cards & OEM Boards ADP1046 Daughter Card
• Manufacturer: Analog Devices
• Series: ADP1046r

Specifications of ADP1046DC1-EVALZ

• Rohs: yes
• Product: Daughter Cards
• Description/function: 100 kHz daughter board
• Interface Type: I2C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V
• Factory Pack Quantity: 1
• For Use With: ADP1046

Data Sheet
Table 104. Register 0x68—Reserved
Bits
[7:0]
Table 105. Register 0x69—Reserved
Bits
[7:0]
Table 106. Register 0x6A—Reserved
Bits
[7:0]
Table 107. Register 0x6B—Reserved
Bits
[7:0]
Table 108. Register 0x6C—Reserved
Bits
[7:0]
Table 109. Register 0x6D—Reserved
Bits
[7:0]
Table 110. Register 0x6E—Reserved
Bits
[7:0]
Table 111. Register 0x6F— Reserved
Bits
[7:0]
Table 112. Register 0x70— Reserved
Bits
[7:0]
SOFT START FILTER PROGRAMMING REGISTERS
Table 113. Register 0x71—Soft Start Digital Filter LF Gain Setting
Bits
[7:0]
Table 114. Register 0x72—Soft Start Digital Filter Zero Setting
Bits
[7:0]
Table 115. Register 0x73—Soft Start Digital Filter Pole Setting
Bits
[7:0]
Table 116. Register 0x74—Soft Start Digital Filter HF Gain Setting
Bits
[7:0]
Bit Name
Reserved
Bit Name
Reserved
Bit Name
Reserved
Bit Name
Reserved
Bit Name
Reserved
Bit Name
Reserved
Bit Name
Reserved
Bit Name
Reserved
Bit Name
Reserved
Bit Name
LF gain setting
Bit Name
Zero setting
Bit Name
Pole location
Bit Name
HF gain setting
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved.
Description
Reserved.
Description
Reserved.
Description
Reserved.
Description
Reserved.
Description
This register determines the low frequency gain of the loop response. Programmable over a 20 dB
range. Each LSB corresponds to a 0.3 dB increase. See Figure 57.
Description
This register determines the position of the final zero. See Figure 57.
Description
This register determines the position of the final pole. See Figure 57.
Description
This register determines the high frequency gain of the loop response. Programmable over a 20 dB
range. Each LSB corresponds to a 0.3 dB increase. See Figure 57.
Description
Reserved.
Description
Reserved
Description
Reserved
Description
Reserved
Rev. B | Page 77 of 92
ADP1046