ADP1046DC1-EVALZ Analog Devices, ADP1046DC1-EVALZ Datasheet - Page 39

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ADP1046DC1-EVALZ

Manufacturer Part Number
ADP1046DC1-EVALZ
Description
Daughter Cards & OEM Boards ADP1046 Daughter Card
Manufacturer
Analog Devices
Series
ADP1046r
Datasheet

Specifications of ADP1046DC1-EVALZ

Rohs
yes
Product
Daughter Cards
Description/function
100 kHz daughter board
Interface Type
I2C
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3.3 V
Factory Pack Quantity
1
For Use With
ADP1046
Data Sheet
GENERAL CALL SUPPORT
The
general call address. The general call address is supported for
send, write, and read commands that use Address 0x00 as the
slave address. The I
and to the general call address (0x00).
Note that all commands start with a slave address with the R/ W
bit cleared (set to 0), followed by the command code. This is
also true when using the general call address to communicate
with the I
10-BIT ADDRESSING
The
the I
FAST MODE
Fast mode (400 kB/sec) uses essentially the same mechanics
as the standard mode of operation; the electrical specifications
and timing are most affected. The I
nicating with a master device operating in standard mode
(100 kB/sec) or fast mode.
REPEATED START CONDITION
In general, a repeated start condition is the absence of a stop
condition between two transfers. The two transfers can be of
any direction type, for example, a transmit followed by a receive
or a receive followed by a transmit. However, the
communication protocol uses the repeated start condition only
when performing a read access (read byte, read word, and block
read). Other uses of the repeated start condition are not allowed.
ELECTRICAL SPECIFICATIONS
All logic complies with the electrical specifications outlined in the
Philips I
FAULT CONDITIONS
The I
conditions that are monitored during communication. These
communication faults are error conditions associated with the
data transfer mechanism of the I
in the following sections.
TIMEOUT CONDITION
A timeout condition occurs if any single SCL clock pulse is held
low for longer than the t
timeout condition, the I
transfer, release the bus lines, and be ready to accept a new start
condition. The device initiating the timeout is required to hold
the SCL clock line low for a minimum of t
guaranteeing that the slave device is given enough time to reset
its communication protocol.
ADP1046
ADP1046
2
C specification.
2
C protocol provides a very comprehensive set of fault
2
C Bus Specification, Version 2.1, dated January 2000.
2
C slave device.
is capable of decoding and acknowledging a
does not support 10-bit addressing as defined in
2
C slave responds to both its own address
2
TIMEOUT, MIN
C slave device has 10 ms to abort the
2
C protocol and are explained
2
of 25 ms. Upon detecting the
C slave is capable of commu-
TIMEOUT, MAX
ADP1046
= 35 ms,
I
2
Rev. B | Page 39 of 92
C
DATA TRANSMISSION FAULTS
Data transmission faults occur when two communicating
devices violate the I
Sending Too Few Bits
Transmission is interrupted by a start or stop condition before
a complete byte (eight bits) has been sent. Not supported; any
transmitted data is ignored.
Reading Too Few Bits
Transmission is interrupted by a start or stop condition before
a complete byte (eight bits) has been read. Not supported; any
received data is ignored.
Host Sends or Reads Too Few Bytes
If a host ends a packet with a stop condition before the required
bytes are sent/received, it is assumed that the host intended to
stop the transfer. Therefore, the I
to be an error and takes no action, except to flush any remain-
ing bytes in the transmit FIFO.
Host Sends Too Many Bytes
If a host sends more bytes than are expected for the corre-
sponding command, the I
transmission fault and responds as follows:
Host Reads Too Many Bytes
If a host reads more bytes than are expected for the corre-
sponding command, the I
transmission fault and sends all 1s (0xFF) as long as the host
continues to request data.
Device Busy
The I
master device. Typically SCL clock stretching is involved until
the device is free to communicate.
DATA CONTENT FAULTS
Data content faults occur when data transmission is successful,
but the I
from the master device.
Improperly Set Read Bit in the Address Byte
All I
cleared (set to 0), followed by the command code. If a host
starts an I
(equivalent to an I
content fault and responds as follows:
2
NACKs all unexpected bytes as they are received
Flushes and ignores the received command and data
ACKs the address byte
NACKs the command and data bytes
Sends all 1s (0xFF) as long as the host continues to
request data
C commands start with a slave address with the R/ W bit
2
C slave device is too busy to respond to a request from the
2
C slave device cannot process the data that is received
2
C transaction with R/ W set in the address phase
2
C read), the I
2
C communication protocol.
2
2
C slave considers this a data
C slave considers this a data
2
2
C slave considers this a data
C slave does not consider this
ADP1046

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