ADP1046DC1-EVALZ Analog Devices, ADP1046DC1-EVALZ Datasheet - Page 58

• Manufacturer Part Number: ADP1046DC1-EVALZ
• Description: Daughter Cards & OEM Boards ADP1046 Daughter Card
• Manufacturer: Analog Devices
• Series: ADP1046r

Specifications of ADP1046DC1-EVALZ

• Rohs: yes
• Product: Daughter Cards
• Description/function: 100 kHz daughter board
• Interface Type: I2C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V
• Factory Pack Quantity: 1
• For Use With: ADP1046

Table 44. Register 0x2C—PSON/Soft Start
Bits
[7:6]
5
[4:3]
2
1
0
Table 45. Register 0x2D—PGOOD Debounce and Pin Polarity Settings
Bits
[7:6]
[5:4]
3
2
1
0
ADP1046
Bit Name
PS_ON setting
PS_ON
PS_ON delay
Reserved
Disable light load
during soft start
Force soft start
filter
Bit Name
PGOOD1 turn-on
debounce
PGOOD2 turn-on
debounce
PGOOD2 flags
FLAGIN polarity
GATE polarity
PSON polarity
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
These bits determine which signal is used by the
Bit 7
0
0
1
1
Software PS_ON bit.
0 = power supply off.
1 = power supply on.
These bits set the time from when the PS_ON control signal is set to when the soft start begins.
Bit 4
0
0
1
1
Set this bit to 0 for normal operation.
0 = allow switching to light load mode filter during soft start.
1 = never switch to light load mode filter during soft start.
0 = use normal mode filter or soft start filter, depending on the OrFET status. If regulating from
VS3 (OrFET on), the normal mode filter is used. If regulating from VS1 (OrFET off ), the soft start
filter is used.
1 = use soft start filter as the initial filter regardless of OrFET status.
Description
These bits set the debounce time before the PGOOD1 pin and flag are set. This debounce time
starts at the end of the soft start ramp and can vary by ±50 ms. The turn-off of PGOOD1 is always
immediate (no debounce).
Bit 7
0
0
1
1
These bits set the debounce time before the PGOOD2 pin and flag are set. This debounce time
starts at the end of the soft start ramp and can vary by ±50 ms. The turn-off of PGOOD2 is always
immediate (no debounce).
Bit 5
0
0
1
1
The following flags can also set the PGOOD2 pin: voltage continuity, OrFET disable, ACSNS, FLAGIN,
and OTP. This bit specifies whether these flags unconditionally set PGOOD2 or whether these flags
set PGOOD2 only if the flag action is not set to ignore (Bits[6:4] = 000) in the appropriate fault
configuration register (see Table 12 and Table 13).
0 = voltage continuity, OrFET disable, ACSNS, FLAGIN, and OTP flags always set the PGOOD2 pin.
1 = voltage continuity, OrFET disable, ACSNS, FLAGIN, and OTP flags set the PGOOD2 pin only if the
flag action is not set to ignore.
This bit sets the polarity of the FLAGIN input pin: 1 = inverted (low = 0 V = on).
This bit sets the polarity of the OrFET GATE control pin: 1 = inverted (low = 0 V = on).
This bit sets the polarity of the PSON input pin: 1 = inverted (low = 0 V = on).
Bit 6
0
1
0
1
Bit 4
0
1
0
1
Bit 6
0
1
0
1
Bit 3
0
1
0
1
Rev. B | Page 58 of 92
PS_ON Setting
The
Hardware PSON pin is used to enable or disable the power supply.
Software PS_ON bit (Bit 5) is used to enable or disable the power supply.
Both the software PS_ON bit and the hardware PSON pin must be enabled
before the
Typical Delay (sec)
0
0.5
1
2
Typical Debounce Time (ms)
350
150
550
0
Typical Debounce Time (ms)
350
150
550
0
ADP1046
ADP1046
is always on.
is enabled.
ADP1046
as the PS_ON control.
Data Sheet