ADP1046DC1-EVALZ Analog Devices, ADP1046DC1-EVALZ Datasheet - Page 72

• Manufacturer Part Number: ADP1046DC1-EVALZ
• Description: Daughter Cards & OEM Boards ADP1046 Daughter Card
• Manufacturer: Analog Devices
• Series: ADP1046r

Specifications of ADP1046DC1-EVALZ

• Rohs: yes
• Product: Daughter Cards
• Description/function: 100 kHz daughter board
• Interface Type: I2C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V
• Factory Pack Quantity: 1
• For Use With: ADP1046

Table 82. Register 0x52—SR1 Rising Edge Setting (SR1 Pin)
Bits
[7:4]
3
2
1
0
Table 83. Register 0x53—SR1 Falling Edge Timing (SR1 Pin)
Bits
[7:0]
Table 84. Register 0x54—SR1 Falling Edge Setting (SR1 Pin)
Bits
[7:4]
3
2
1
0
Table 85. Register 0x55—SR2 Rising Edge Timing (SR2 Pin)
Bits
[7:0]
ADP1046
Bit Name
t
Modulate enable
t
Reserved
SR soft start edge
control
Bit Name
t
Bit Name
t
Modulate enable
t
SR soft start setting
SR soft start enable
Bit Name
t
9
9
10
10
10
11
sign
sign
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
These bits contain the four LSBs of the 12-bit t
bits of Register 0x51, which contains the eight MSBs of the t
5 ns resolution. The entire switching period is divided into 40 ns time steps. If the t_rise and
t_fall of a PWM edge occur within the same 40 ns time step, the PWM output is 0 V. If the t_rise
and t_fall occur in different 40 ns time steps, the PWM output is set to the programmed value.
The absolute maximum pulse width is t
not be set between 80 ns and 115 ns when using the SR soft start.
1 = PWM modulation acts on the t
0 = no PWM modulation of the t
1 = negative sign. Increase of PWM modulation moves t
0 = positive sign. Increase of PWM modulation moves t
Reserved.
0 = always allow SR edge crossing.
1 = allow SR edge crossing only during SR soft start (recommended).
Description
This register contains the eight MSBs of the 12-bit t
four bits of Register 0x54, which contains the four LSBs of the t
5 ns resolution. The entire switching period is divided into 40 ns time steps. If the t_rise and
t_fall of a PWM edge occur within the same 40 ns time step, the PWM output is 0 V. If the t_rise
and t_fall occur in different 40 ns time steps, the PWM output is set to the programmed value.
The absolute maximum pulse width is t
Description
These bits contain the four LSBs of the 12-bit t
bits of Register 0x53, which contains the eight MSBs of the t
5 ns resolution. The entire switching period is divided into 40 ns time steps. If the t_rise and
t_fall of a PWM edge occur within the same 40 ns time step, the PWM output is 0 V. If the t_rise
and t_fall occur in different 40 ns time steps, the PWM output is set to the programmed value.
The absolute maximum pulse width is t
1 = PWM modulation acts on the t
0 = no PWM modulation of the t
1 = negative sign. Increase of PWM modulation moves t
0 = positive sign. Increase of PWM modulation moves t
1 = SR signals perform a soft start every time that they are enabled.
0 = SR signals perform a soft start only the first time that they are enabled.
Setting this bit enables the soft start function for the SR signals.
Description
This register contains the eight MSBs of the 12-bit t
four bits of Register 0x56, which contains the four LSBs of the t
5 ns resolution. The entire switching period is divided into 40 ns time steps. If the t_rise and
t_fall of a PWM edge occur within the same 40 ns time step, the PWM output is 0 V. If the t_rise
and t_fall occur in different 40 ns time steps, the PWM output is set to the programmed value.
The absolute maximum pulse width is t
not be set between 80 ns and 115 ns when using the SR soft start.
Rev. B | Page 72 of 92
9
10
edge.
9
10
edge.
edge.
edge.
PERIOD
PERIOD
PERIOD
PERIOD
− 5 ns. It is recommended that the SR1 rising edge
− 5 ns.
− 5 ns.
− 5 ns. It is recommended that the SR2 rising edge
9
10
time. This value is always used with the eight
time. This value is always used with the eight
10
11
time. This value is always used with the top
time. This value is always used with the top
9
10
9
10
left.
left.
right.
right.
9
10
time. Each LSB corresponds to
time. Each LSB corresponds to
10
11
time. Each LSB corresponds to
time. Each LSB corresponds to
Data Sheet