ADP1046DC1-EVALZ Analog Devices, ADP1046DC1-EVALZ Datasheet - Page 30

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ADP1046DC1-EVALZ

Manufacturer Part Number
ADP1046DC1-EVALZ
Description
Daughter Cards & OEM Boards ADP1046 Daughter Card
Manufacturer
Analog Devices
Series
ADP1046r
Datasheet

Specifications of ADP1046DC1-EVALZ

Rohs
yes
Product
Daughter Cards
Description/function
100 kHz daughter board
Interface Type
I2C
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3.3 V
Factory Pack Quantity
1
For Use With
ADP1046
CS2 OCP
CS2 has one OCP protection circuit: CS2 accurate OCP (see
Figure 39). The reading at the output of the CS2 ADC (Register
0x18) is compared to a programmable OCP threshold. The CS2
OCP threshold can be programmed using Register 0x26[7:0]. If
the CS2 reading exceeds the CS2 OCP threshold, the CS2 accurate
OCP flag is set. The CS2 ADC is asynchronously sampled, and
the readings are averaged every 2.62 ms to make a fault decision.
The flag response is programmed in Register 0x09.
CONSTANT CURRENT MODE
The
mode. The threshold to enter constant current mode operation is
3% current below the CS2 accurate OCP setting (see Figure 40).
Below this current, the part operates in constant voltage mode,
using the output voltage as the feedback signal for closed-loop
operation.
When the
a flag is set in Register 0x02[4] and in Register 0x06[4] (real-time
and latched flag registers, respectively). When this flag is set,
the CS2 current reading is used to control the output voltage
regulation point. The output voltage is ramped down linearly as
the load increases to ensure that the current remains constant.
ADP1046
V
OUT
ADP1046
NOMINAL
ADP1046
V
OUT
Figure 40. Constant Current Mode (V
can be configured to operate in constant current
reaches the constant current mode threshold,
200µA
CS2–
5kΩ
1V
5kΩ
CS2+
200µA
OUT
0.97 × OCP
vs. I
ADC
OUT
Figure 39. CS2 OCP Detailed Internal Schematic
)
OCP
12
2.62ms AVERAGING
ASYNCHRONOUS
Rev. B | Page 30 of 92
I
OUT
CS2 ACCURATE
OCP SETTING
REG 0x26
The constant current control loop is relatively low bandwidth
because the current is averaged over a 328 µs period. The output
voltage changes at a maximum rate of 1.18 V/sec at the VS3± pins;
therefore, the instantaneous value of the current can exceed the
constant current limit for a very short period of time, depend-
ing upon the transient.
As the output voltage falls, the UVP flag (Register 0x0B[3:0])
can be used to program a shutdown action.
OVERVOLTAGE PROTECTION (OVP)
The
voltage at the VS1 pin, VS2 pin, or VS3± pins exceeds the
programmable threshold for that pin, the appropriate OVP flag
is set. The flag response is programmed in Register 0x09[3:0]
for the VS2 and VS3 OVP flags or in Register 0x0A[7:4] for the
VS1 OVP flag.
VS1 has two OVP circuits: a fast comparator (fast OVP) and an
ADC based comparator (accurate OVP). VS2 and VS3 share an
accurate OVP circuit.
The OVP circuits can be programmed for different OVP
thresholds. See Register 0x32 and Register 0x33 for more
information.
The sampling time for the ADC based comparators is 80 µs.
Additional debounce in steps of 80 µs can be added using
Bits[1:0] of Register 0x32 and Register 0x33.
The fast OVP comparator also has a programmable threshold and
debounce time. These values are programmed in Register 0x37.
ADP1046
PROGRAMMABLE DEBOUNCE
(REG 0x0E AND REG 0x09)
has three separate OVP circuits. If the output
AND ACTION
Data Sheet

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