ADP1046DC1-EVALZ Analog Devices, ADP1046DC1-EVALZ Datasheet - Page 37

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ADP1046DC1-EVALZ

Manufacturer Part Number
ADP1046DC1-EVALZ
Description
Daughter Cards & OEM Boards ADP1046 Daughter Card
Manufacturer
Analog Devices
Series
ADP1046r
Datasheet

Specifications of ADP1046DC1-EVALZ

Rohs
yes
Product
Daughter Cards
Description/function
100 kHz daughter board
Interface Type
I2C
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3.3 V
Factory Pack Quantity
1
For Use With
ADP1046
Data Sheet
I
The
to communicate with other I
is compatible in a multimaster, multislave bus configuration.
FEATURES
The function of the I
the master device and respond as requested. Communication is
established using a 2-wire interface with a clock line (SCL) and
data line (SDA). The I
chunks of 8-bit data (bytes) while maintaining compliance with
the I
Version 2.1, dated January 2000. The I
the following features:
OVERVIEW
The I
communicate with other I
fer protocol is based on the Philips I
ADP1046
system. The
using one data pin (SDA) and one clock pin (SCL). Because the
ADP1046
However, it is capable of stretching the SCL line to put the
master device in a wait state when it is not ready to respond
to the master’s request.
Communication is initiated when the master device sends a
command to the I
write commands, in which case data is transferred between the
devices in a byte-wide format. Commands can also be send
commands, in which case the command is executed by the slave
device upon receiving the stop bit. The stop bit is the last bit in
a complete data transfer, as defined in the I
protocol. During communication, the master and slave devices
send acknowledge (A) or no acknowledge (NA) bits as a method
of handshaking between devices. Refer to the Philips I
Specification, Version 2.1, dated January 2000, for a more detailed
description of the communication protocol.
2
C INTERFACE COMMUNICATION
ADP1046
2
Slave operation on multiple device systems
7-bit addressing
100 kB/sec and 400 kB/sec data rates
General call address support
Support for clock low extension (clock stretching)
Separate multiple byte receive and transmit FIFO
Extensive communication fault monitoring
C protocol, based on the Philips I
2
C slave module is a 2-wire interface that can be used to
is always configured as a slave device in the overall
is a slave device, it cannot generate the clock signal.
ADP1046
I
2
C slave is a 2-wire interface that can be used
2
C slave device. Commands can be read or
2
C slave is to decode the command sent from
2
C slave is designed to externally move
communicates with the master device
2
C-compliant master devices. Its trans-
2
C-compliant master devices and
2
C transfer mechanism. The
2
2
C protocol incorporates
C Bus Specification,
2
C communication
2
C Bus
Rev. B | Page 37 of 92
I
The I
external resistor from the ADD pin to AGND. Table 6 lists the
recommended resistor values and the associated I
Seven different addresses can be used.
The recommended resistor values in Table 6 must be 1%
tolerance resistors.
Table 6. Recommended Resistor Values for I
I
0x50
0x51
0x52
0x53
0x54
0x55
0x57
DATA TRANSFER
Format Overview
The I
Specification. Data transfers are byte-wide, lower byte first. Each
byte is transmitted serially, most significant bit (MSB) first. A
typical transfer is shown in Figure 45.
Figure 45 to Figure 52 use the following abbreviations:
Refer to the I
transfer protocols.
2
2
C Address
C ADDRESS
S
= MASTER-TO-SLAVE
= SLAVE-TO-MASTER
S = start condition
Sr = repeated start condition
P = stop condition
R = read bit
W = write bit
A = acknowledge bit (0)
NA = no acknowledge bit (1)
2
2
C address of the
C slave follows the transfer protocol of the Philips I
7-BIT SLAVE
ADDRESS
2
C specification for an in-depth discussion of the
Resistor Value (kΩ)
10 (or connect the ADD pin directly to AGND)
28.7
48.7
68.1
88.7
109
200 (or connect the ADD pin directly to VDD)
Figure 45. Basic Data Transfer
W
ADP1046
A
is set by connecting an
DATA
8-BIT
A
2
C Addresses
2
ADP1046
C addresses.
...
P
2
C Bus

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