CDB5376 Cirrus Logic Inc, CDB5376 Datasheet - Page 17

EVALUATION BOARD FOR CS5376

CDB5376

Manufacturer Part Number
CDB5376
Description
EVALUATION BOARD FOR CS5376
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB5376

Main Purpose
Seismic Evaluation System
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
CS3301A, CS3302A, CS4373A, CS5372A, CS5376A
Primary Attributes
Quad Digital Filter
Secondary Attributes
Graphical User Interface, SPI™ & USB Interfaces
Processor To Be Evaluated
CS330x, CS4373A, CS537x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1778
SWITCHING CHARACTERISTICS
CLK, SYNC, MCLK, MSYNC, and MDATAx
Notes: 3. Master clock frequencies above or below 32.768 MHz will affect generated clock frequencies.
DS612F4
Master Clock Frequency
Master Clock Duty Cycle
Master Clock Rise Time
Master Clock Fall Time
Master Clock Jitter
Synchronization after SYNC rising
MSYNC Setup Time to MCLK rising
MCLK rising to Valid MDATA
MSYNC falling to MCLK rising
SYNC
MCLK
MSYNC
MDATAx
4. Sampling synchronization between multiple CS5376A devices receiving identical SYNC signals.
Note: SYNC input latched on MCLK rising edge. MSYNC output triggered by MCLK falling edge.
t
t
msd
msh
Parameter
= T
= T
Figure 7. SYNC, MCLK, MSYNC, MDATA Interface Timing
f
MCLK
MCLK
MCLK
t
msd
/ 4
t
msh
t
t
msd
msh
2.048 MHz
(Note 3)
(Note 4)
= 122 ns
= 488 ns
t
Symbol
msd
SYNC
t
t
DTY
CLK
JTR
t
t
RISE
FALL
t
mdv
msr
msf
Data1
t
t
msd
msh
Min
1.024 MHz
32
40
20
20
-2
-
-
-
-
= 244 ns
= 976 ns
32.768
Typ
-
-
-
-
-
-
-
-
Max
300
CS5376A
Data2
33
60
20
20
75
2
-
-
MHz
Unit
ns
ns
ps
µs
ns
ns
ns
%
17

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