CDB5376 Cirrus Logic Inc, CDB5376 Datasheet - Page 80

EVALUATION BOARD FOR CS5376

CDB5376

Manufacturer Part Number
CDB5376
Description
EVALUATION BOARD FOR CS5376
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB5376

Main Purpose
Seismic Evaluation System
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
CS3301A, CS3302A, CS4373A, CS5372A, CS5376A
Primary Attributes
Quad Digital Filter
Secondary Attributes
Graphical User Interface, SPI™ & USB Interfaces
Processor To Be Evaluated
CS330x, CS4373A, CS537x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1778
Added Test Bit Stream (TBS) synchroniza-
tion in sine wave mode.
Modified Time Break delay function.
80
The TBS sine wave phase will reset if bit 11 of
the TBSCFG register is set (TBSCFG bit 11 =
1) and a rising edge is received on the SYNC
pin. When TBSCFG bit 11 is set low (TBSCFG
bit 11 = 0), TBS phase is unaffected by the
SYNC input similar to CS5376 revision A/B.
The timing delay between receiving a rising
edge on the TIMEB pin and asserting the
TIMEB flag in the output word status bits is
corrected. In CS5376 revision A/B a '0' value in
the TIMEBREAK register (0x29) disabled the
TIMEB status bit write, and a '1' value set the
status bit in the current output word. Now, a '0'
value sets the TIMEB status bit in the current
output word, and a '1' value delays until the fol-
lowing word.
CS5376A
DS612F4

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