HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 158

• Manufacturer Part Number: HD64F3067RF20
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3067RF20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 6 Bus Controller
6.2.6
CSCR is an 8-bit readable/writable register that enables or disables output of chip select signals
(CS
If output of a chip select signal is enabled by a setting in this register, the corresponding pin
functions as a chip select signal (CS
be modified in single-chip mode.
CSCR is initialized to H'0F by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 4—Chip Select 7 to 4 Enable (CS7E to CS4E): These bits enable or disable output of
the corresponding chip select signal.
Bit n
CSnE
0
1
Note: n = 7 to 4
Rev. 4.00 Jan 26, 2006 page 134 of 938
REJ09B0276-0400
Bit
Initial value
Read/Write :
7
to CS
Chip Select Control Register (CSCR)
4
).
CS7E
R/W
7
0
Description
Output of chip select signal CSn is disabled
Output of chip select signal CSn is enabled
CS6E
R/W
6
0
Chip select 7 to 4 enable
These bits enable or disable
chip select signal output
7
CS5E
R/W
to CS
5
0
4
) output regardless of any other settings. CSCR cannot
CS4E
R/W
4
0
—
—
3
1
—
—
2
1
Reserved bits
—
—
1
1
(Initial value)
—
—
0
1