HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 665

• Manufacturer Part Number: HD64F3067RF20
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3067RF20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

The error protection function is disabled for errors other than the FLER bit set conditions. If
considerable time elapses up to transit to this protection state, the flash memory may already be
damaged. As a result, this function cannot completely protect the flash memory against damage.
Therefore, to prevent such erroneous operation, operation must be carried out correctly in
according with the program/erase algorithms in the state that flash write enable (FWE) is set. In
addition, the operation must be always carried out correctly by supervising microcomputer errors
inside and outside the chip with the watchdog timer, etc. At transition to this protection mode, the
flash memory may be erroneously programmed or erased, or its abort may result in incomplete
P=1 or E=1
RD VF PR ER FLER=0
Error occurrence
(When High level apply to FWE pin in modes 5 and 7 (on-chip ROM enabled))
Program mode
Erase mode
RD
VF
PR
ER
RD VF PR ER FLER=1
Error protection mode
: Memory read enable
: Verify-read enable
: Programming enable
: Erasing enable
Memory read verify mode
RD VF PR ER FLER=0
P=0 and E=0
Figure 18.13 Flash Memory State Transitions
Reset or hardware standby mode
Software standby
RD
VF
PR
ER
INIT
standby mode
mode release
Software
: Memory read disabled
: Verify-read disabled
: Programming disabled
: Erasing disabled
: Registers (FLMCR, EBR) initialize state
Rev. 4.00 Jan 26, 2006 page 641 of 938
RD VF PR ER INIT FLER=1
(software standby mode)
Error protection mode
RD VF PR ER INIT FLER=0
Reset or standby mode
(hardware protection)
Reset or hardware
standby mode
REJ09B0276-0400
Section 18 ROM