HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 639

IC H8 MCU FLASH 128K 100-QFP

HD64F3067RF20

Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3067RF20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Bit 0—Program (P) *
PSU, EV, PV, or E bit at the same time.
Bit 0:
P
0
1
Notes: 1. Do not set two or more bits at the same time.
18.3.2
EBR is an 8-bit register that designates the flash memory block for erasure. EBR is initialized to
H'00 by a reset, in hardware standby mode, or software standby mode, when a high level is not
input to the FWE terminal, or when the FLMCR SWE bit is 0 when a high level is applied to the
FWE terminal. When a bit is set in EBR, the corresponding block can be erased. Other blocks are
erase - protected. The blocks are erased block by block. Therefore, set only one bit in EBR; do not
set bits in EBR to erase two or more blocks at the same time.
Each bit in EBR cannot be set until the SWE bit in FLMCR is set. The flash memory block
configuration is shown in table 18.4. To erase all the blocks, erase each block sequentially.
The H8/3067 Group does not support the on-board programming mode in mode 6, so bits in this
register cannot be set to 1 in mode 6.
Modes 1
to 4, and 6
Modes 5
and 7
2. Do not set/clear the SWE bit simultaneously with other bits (ESU, PSU, EV, PV, E, P).
3. Set the P and E bits according to the program and erase algorithms shown in section
Erase Block Register (EBR)
Do not turn off V
18.5, Programming and Erasing Flash Memory.
For the usage precautions, see section 18.9, Notes on Flash Memory
Programming/Erasing.
Description
Program mode cleared
Transition to program mode
[Setting condition]
When FWE = 1, SWE = 1, and PSU = 1
Bit
Initial value
R/W
Initial value
R/W
1
*
3
: Selects program mode transition or clearing. Do not set the SWE, ESU,
R/W
EB7
CC
R
0
0
7
when a bit is set.
R/W
EB6
R
6
0
0
EB5
R/W
R
5
0
0
EB4
R/W
4
R
0
0
Rev. 4.00 Jan 26, 2006 page 615 of 938
EB3
R/W
3
R
0
0
EB2
R/W
2
R
0
0
REJ09B0276-0400
Section 18 ROM
EB1
R/W
(Initial value)
1
R
0
0
R/W
EB0
R
0
0
0

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