HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 644

IC H8 MCU FLASH 128K 100-QFP

HD64F3067RF20

Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3067RF20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 18 ROM
Bit 7—Flash Memory Error (FLER): Indicates that an error occurred while flash memory was
being programmed or erased. When bit 7 is set, flash memory is placed in an error-protect mode.
Bit 7
FLER
0
1
Notes: 1. For details, see section 18.6.3, Error Protection.
Bits 6 to 0—Reserved: These bits cannot be modified and are always read as 1.
Rev. 4.00 Jan 26, 2006 page 620 of 938
REJ09B0276-0400
2. The read data has undetermined values.
3. Before stack and vector read by exception handling.
Description
Flash memory program/erase protection (error protection *
[Clearing conditions]
WDT reset, reset by RES pin, or hardware standby mode
An error has occurred during flash memory programming/erasing
Flash memory program/erase protection (error protection *
[Setting conditions]
1. Flash memory was read *
2. A hardware exception-handling sequence (other than a reset, invalid instruction,
3. The SLEEP instruction (including software standby mode) was executed during
instruction fetch, but not including reading of a RAM area overlapped onto flash
memory).
trap instruction, or zero-divide exception) was executed just before programming or
erasing. *
programming or erasing.
3
2
while being programmed or erased (including vector or
1
1
) is disabled (Initial value)
) is enabled

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