HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 573

• Manufacturer Part Number: HD64F3067RF20
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3067RF20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

14.2.3
The function of SMR bit 7 is modified in smart card interface mode. This change also causes a
modification to the function of bits 1 and 0 in the serial control register (SCR).
Bit 7—GSM Mode (GM): With the normal smart card interface, this bit is cleared to 0. Setting
this bit to 1 selects GSM mode, an additional mode for controlling the timing for setting the
TEND flag that indicates completion of transmission, and the type of clock output used. The
details of the additional clock output control mode are specified by the CKE1 and CKE0 bits in
the serial control register (SCR).
Bit 7
GM
0
1
Bits 6 to 0: These bits operate as in normal serial communication. For details see section 13.2.5,
Serial Mode Register (SMR).
Bit
Initial value
Read/Write
Serial Mode Register (SMR)
Description
Normal smart card interface mode operation
The TEND flag is set 12.5 etu after the beginning of the start bit.
Clock output on/off control only.
GSM mode smart card interface mode operation
The TEND flag is set 11.0 etu after the beginning of the start bit.
Clock output on/off and fixed-high/fixed-low control.
R/W
GM
7
0
CHR
R/W
6
0
R/W
PE
5
0
R/W
O/E
4
0
Rev. 4.00 Jan 26, 2006 page 549 of 938
STOP
R/W
3
0
Section 14 Smart Card Interface
R/W
MP
2
0
CKS1
R/W
REJ09B0276-0400
1
0
(Initial value)
CKS0
R/W
0
0