HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 561

• Manufacturer Part Number: HD64F3067RF20
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3067RF20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

The receive margin in asynchronous mode can therefore be expressed as shown in equation (1).
From equation (1), if F = 0 and D = 0.5, the receive margin is 46.875%, as given by equation (2).
This is a theoretical value. A reasonable margin to allow in system designs is 20% to 30%.
Restrictions on Use of DMAC:
When an external clock source is used for the serial clock, after the DMAC updates TDR,
allow an inversion of at least five system clock ( ) cycles before input of the serial clock to
start transmitting. If the serial clock is input within four states of the TDR update, a
malfunction may occur. (See figure 13.22)
To have the DMAC read RDR, be sure to select the corresponding SCI receive-data-full
interrupt (RXI) as the activation source with bits DTS2 to DTS0 in DTCR.
D = 0.5, F = 0
M =
M:
N:
D:
L:
F:
M =
= 46.875%
(0.5
Receive margin (%)
Ratio of clock frequency to bit rate (N = 16)
Clock duty cycle (L = 0 to 1.0)
Frame length (L = 9 to 12)
Absolute deviation of clock frequency
(0.5
2
1
2N
16
1
)
)
(L
100%
0.5) F
D
Section 13 Serial Communication Interface
Rev. 4.00 Jan 26, 2006 page 537 of 938
N
0.5
(1 + F)
. . . . . . . . (1)
. . . . . . . . (2)
100%
REJ09B0276-0400