HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 492

IC H8 MCU FLASH 128K 100-QFP

HD64F3067RF20

Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3067RF20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3067RF20
Manufacturer:
HIT
Quantity:
610
Part Number:
HD64F3067RF20
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3067RF20
Manufacturer:
HITACHI/日立
Quantity:
20 000
Part Number:
HD64F3067RF20V
Manufacturer:
RENESAS
Quantity:
1 000
Section 12 Watchdog Timer
Bit 7—Watchdog Timer Reset (WRST): During watchdog timer operation, this bit indicates that
TCNT has overflowed and generated a reset signal. This reset signal resets the entire H8/3067 chip
internally. If bit RSTOE is set to 1, this reset signal is also output (low) at the RESO pin to
initialize external system devices. Note that there is no RESO pin in the flash memory and flash
memory R versions.
Bit 6—Reset Output Enable (RSTOE): Enables or disables external output at the RESO pin of
the reset signal generated if TCNT overflows during watchdog timer operation. Note that there is
no RESO pin in the flash memory and flash memory R versions.
Bits 5 to 0—Reserved: These bits cannot be modified and are always read as 1.
Rev. 4.00 Jan 26, 2006 page 468 of 938
REJ09B0276-0400
Bit 7
WRST
0
1
Bit 6
RSTOE Description
0
1
[Clearing condition]
Reset signal at RES pin.
Read WRST when WRST =1, then write 0 in WRST.
Description
[Setting condition]
Set when TCNT overflow generates a reset signal during watchdog timer operation
Reset signal is not output externally (Initial value)
Reset signal is output externally
(Initial value)
(Initial value)

Related parts for HD64F3067RF20