WG82574L S LBA9 Intel, WG82574L S LBA9 Datasheet - Page 159

• Manufacturer Part Number: WG82574L S LBA9
• Description: CONTROLLER, ENET, INTEL 82574L, 64PQFN
• Manufacturer: Intel

Specifications of WG82574L S LBA9

• Ethernet Type: IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +85°C
• Digital Ic Case Style: QFN
• No. Of Pins: 64
• Package / Case: QFN
• Interface Type: I2C, JTAG, PCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Inline Functions—82574 GbE Controller
7.2.4.3
7.2.5
7.2.6
Determining Completed Frames as Done
Software can determine if a packet has been sent by the following method:
The process of checking for completed descriptors consists of the following:
Multiple Transmit Queues
The 82574L supports two transmit descriptor rings. Each ring functionality is according
to the description in
also must enable the multiple request support in the TCTL register.
The priority and arbitration between the queues can be set and specified using the
TARC registers in the memory space (see
This feature is intended to enable the support for Quality of Service (QoS), Supporting
802.1p, while classifying packets into different priority queues.
Overview of On-Chip Transmit Modes
Transmit mode is used to refer to a set of configurations that support some of the
transmit path offloads. These modes are updated and controlled with the transmit
descriptors.
There are three types of transmit modes:
The first mode (legacy) is an implied mode as it is not explicitly specified with a context
descriptor. This mode is constructed by the device from the first and last descriptors of
a legacy transmit and from some internal constants. The legacy mode enables insertion
of one checksum.
The other two modes are indicated explicitly by a transmit context descriptor. The
extended mode is used to control the checksum offloading feature for packet
transmission. The segmentation mode is used to control the packet segmentation
capabilities of the device. The TSE bit, in the context descriptor, selects which mode is
updated, that is, extended mode or segmentation mode. The extended and
segmentation modes enable insertion of two checksums. In addition, the segmentation
mode adds information specific to the segmentation capability.
• Setting the RS bit in the transmit descriptor command field and checking the DD bit
• The software device driver scans the host memory for the value of the DD status
• Legacy mode
• Extended mode
• Segmentation mode
of the relevant descriptors in host memory.
bit. When the DD bit =1b, indicates a completed packet, and also indicates that all
packets preceding that packet have been put in the output FIFO.
section
7.2.4. When software enables the two transmit queues, it
section
10.2.6.9).
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