WG82574L S LBA9 Intel, WG82574L S LBA9 Datasheet - Page 362

• Manufacturer Part Number: WG82574L S LBA9
• Description: CONTROLLER, ENET, INTEL 82574L, 64PQFN
• Manufacturer: Intel

Specifications of WG82574L S LBA9

• Ethernet Type: IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +85°C
• Digital Ic Case Style: QFN
• No. Of Pins: 64
• Package / Case: QFN
• Interface Type: I2C, JTAG, PCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.2.7.39
10.2.7.40
10.2.7.41
10.2.7.42
Note:
362
1. The 82574L does not support SMBus ARP.
This register counts the total number of packets received that pass the management
filters, regardless of L3/L4 checksum errors. Flow control packets as well as packets
with L2 errors are not counted. Packets dropped because the management receive
FIFO was full will be counted.
Management Packets Dropped Count - MPDC (0x040B8; R)
This register counts the total number of packets received that pass the management
filters as described in
receive FIFO is full or the packet is longer than 200 bytes. Management packets include
RMCP and ARP
Management Packets Transmitted Count - MPTC (0x040BC; R)
This register counts the total number of packets that are transmitted that are either
received over the SMBus or are generated by the 82574’s ASF function.
Total Octets Received - TORL (0x040C0; R)
Total Octets Received - TORH (0x040C4; R)
These registers make up a logical 64-bit register that counts the total number of octets
received. This register must be accessed using two independent 32-bit accesses. This
register resets whenever the upper 32 bits are read (TORH). In addition, it sticks at
0xFFFF_FFFF_FFFF_FFFF when the maximum value is reached.
All packets received have their octets summed into this register, regardless of their
length, whether they are erred, or whether they are flow control packets. This register
includes bytes received in a packet from the <Destination Address> field through the
<CRC> field, inclusively. This register only increments if receives are enabled.
Broadcast rejected packets are counted in this counter (in contradiction to all other
rejected packets that are not counted).
MPDC
MPTC
TORL
TORH
Field
Field
Field
31:0
31:0
31:0
31:0
1
Bit(s)
Bit(s)
Bit(s)
packets.
Section 3.5
0x0
0x0
0x0
0x0
Initial
Initial
Initial
Value
Value
Value
Number of management packets dropped.
Number of management packets transmitted.
Number of total octets received – lower 4 bytes.
Number of total octets received – upper 4 bytes.
and then are dropped because the management
82574 GbE Controller—Driver Programing Interface
Description
Description
Description