WM8903LGEFK/RV Wolfson Microelectronics, WM8903LGEFK/RV Datasheet - Page 104

• Manufacturer Part Number: WM8903LGEFK/RV
• Description: Audio CODECs ULTRA LOW PWR HI FI CODEC
• Manufacturer: Wolfson Microelectronics

Specifications of WM8903LGEFK/RV

• Audio Codec Type: Stereo Codec
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 6
• No. Of Output Channels: 8
• Adc / Dac Resolution: 24bit
• Sampling Rate: 96kHz
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Adcs / Dacs Signal To Noise Ratio: 96dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8903
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Table 69 FLL Register Map
R130 (82h)
FLL Control 3
R131 (83h)
FLL Control 4
REGISTER
ADDRESS
10:9
15:0
BIT
8:6
5:3
2:0
9:0
FLL_CLK_REF
_DIV [1:0]
FLL_CTRL_RA
TE [2:0]
FLL_OUTDIV
[2:0]
FLL_FRATIO
[2:0]
FLL_K [15:0]
FLL_N [9:0]
LABEL
DEFAULT
0000h
000h
000
000
000
00
FLL Clock Reference Divider
00 = MCLK / 1
01 = MCLK / 2
10 = MCLK / 4
11 = MCLK / 8
MCLK (or other input reference) must
be divided down to <=13.5MHz.
For lower power operation, the
reference clock can be divided down
further if desired.
Frequency of the FLL control block
000 = F
001 = F
010 = F
011 = F
100 = F
101 = F
110 = F
111 = F
Recommended that this register is not
changed from default.
F
000 = 2
001 = 4
010 = 8
011 = 16
100 = 32
101 = 64
110 = 128
111 = 256
(F
F
000 = divide by 1
001 = divide by 2
010 = divide by 4
011 = divide by 8
1XX = divide by 16
000 recommended for F
100 recommended for F
Fractional multiply for F
(MSB = 0.5)
Integer multiply for F
(LSB = 1)
OUT
VCO
OUT
clock divider
clock divider
= F
PD, Rev 4.0, September 2010
VCO
VCO
VCO
VCO
VCO
VCO
VCO
VCO
VCO
DESCRIPTION
/ 1 (Recommended value)
/ 2
/ 3
/ 4
/ 5
/ 6
/ 7
/ 8
/ FLL_OUTDIV)
REF
Production Data
REF
REF
REF
> 1MHz
< 64kHz
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