WM8903LGEFK/RV Wolfson Microelectronics, WM8903LGEFK/RV Datasheet - Page 161

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WM8903LGEFK/RV

Manufacturer Part Number
WM8903LGEFK/RV
Description
Audio CODECs ULTRA LOW PWR HI FI CODEC
Manufacturer
Wolfson Microelectronics
Datasheets

Specifications of WM8903LGEFK/RV

Audio Codec Type
Stereo Codec
No. Of Adcs
2
No. Of Dacs
2
No. Of Input Channels
6
No. Of Output Channels
8
Adc / Dac Resolution
24bit
Sampling Rate
96kHz
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Adcs / Dacs Signal To Noise Ratio
96dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Production Data
Register 6Dh Write Sequencer 1
R110 (6Eh)
Write
Sequencer 2
Register 6Eh Write Sequencer 2
R111 (6Fh)
Write
Sequencer 3
Register 6Fh Write Sequencer 3
w
REGISTER
REGISTER
REGISTER
ADDRESS
ADDRESS
ADDRESS
11:8
BIT
5:0
BIT
11:8
7:0
BIT
7:0
9
8
14
WSEQ_DATA [7:0] 0000_0000 Data to be written in this sequence step. When the
WSEQ_START_INDEX
WSEQ_DATA_START
WSEQ_DELAY
WSEQ_ADDR [7:0]
WSEQ_EOS
WSEQ_ABORT
WSEQ_START
LABEL
[3:0]
LABEL
LABEL
[5:0]
[3:0]
DEFAULT
0000
0
0000_0000 Control Register Address to be written to in
DEFAULT
DEFAULT
00_0000
0000
0
0
End of Sequence flag. This bit indicates whether
the Control Write Sequencer should stop after
executing this step.
0 = Not end of sequence
1 = End of sequence (Stop the sequencer after this
step).
Time delay after executing this step.
Total delay time per step (including execution)=
62.5μs × (2^WSEQ_DELAY + 8)
data width is less than 8 bits, then one or more of
the MSBs of WSEQ_DATA are ignored. It is
recommended that unused bits be set to 0.
Writing a 1 to this bit aborts the current
sequence and returns control of the device
back to the serial control interface.
Writing a 1 to this bit starts the write
sequencer at the memory location indicated
by the WSEQ_START_INDEX field. The
sequence continues until it reaches an “End
of sequence” flag. At the end of the
sequence, this bit will be reset by the Write
Sequencer.
Sequence Start Index. This is the memory
location of the first command in the selected
sequence.
0 to 31 = RAM addresses
32 to 48 = ROM addresses
49 to 63 = Reserved
Bit position of the LSB of the data block
written in this sequence step.
0000 = Bit 0
1111 = Bit 15
this sequence step.
DESCRIPTION
DESCRIPTION
DESCRIPTION
PD, Rev 4.0, September 2010
WM8903
161

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