WM8903LGEFK/RV Wolfson Microelectronics, WM8903LGEFK/RV Datasheet - Page 116

• Manufacturer Part Number: WM8903LGEFK/RV
• Description: Audio CODECs ULTRA LOW PWR HI FI CODEC
• Manufacturer: Wolfson Microelectronics

Specifications of WM8903LGEFK/RV

• Audio Codec Type: Stereo Codec
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 6
• No. Of Output Channels: 8
• Adc / Dac Resolution: 24bit
• Sampling Rate: 96kHz
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Adcs / Dacs Signal To Noise Ratio: 96dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8903
Figure 57 Control Interface Register Write
Figure 58 Control Interface Register Read
Figure 59 Single Register Write to Specified Address
w
SCLK
SDIN
START
D7
device ID
D1
The sequence of signals associated with a single register read operation is illustrated in Figure 58.
The Control Interface also supports other register operations, as listed above. The interface protocol
for these operations is summarised below. The terminology used in the following figures is detailed in
Table 75.
Note that multiple write and multiple read operations are supported using the auto-increment mode.
This feature enables the host processor to access sequential blocks of the data in the WM8903
register map faster than is possible with single register operations.
Table 75 Control Interface Terminology
(Write)
R/W
TERMINOLOGY
ACK
[White field]
[Grey field]
R/W ¯ ¯
A7
A ¯ ¯
Sr
S
A
P
register address
A1
A0
Note: The SDIN pin is used as input for the control register address and data; SDIN
is pulled low by the receiving device to provide the acknowledge (ACK) response
ACK
ReadNotWrite
Data flow from bus master to WM8903
Data flow from WM8903 to bus master
B15
Not Acknowledge (SDIN High)
data bits B15 – B8
Acknowledge (SDIN Low)
Start Condition
DESCRIPTION
Repeated start
Stop Condition
B9
B8
ACK
B7
0 = Write
1 = Read
data bits B7 – B0
PD, Rev 4.0, September 2010
B1
B0
Production Data
ACK
STOP
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