WM8903LGEFK/RV Wolfson Microelectronics, WM8903LGEFK/RV Datasheet - Page 29

• Manufacturer Part Number: WM8903LGEFK/RV
• Description: Audio CODECs ULTRA LOW PWR HI FI CODEC
• Manufacturer: Wolfson Microelectronics

Specifications of WM8903LGEFK/RV

• Audio Codec Type: Stereo Codec
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 6
• No. Of Output Channels: 8
• Adc / Dac Resolution: 24bit
• Sampling Rate: 96kHz
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Adcs / Dacs Signal To Noise Ratio: 96dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
DEVICE DESCRIPTION
INTRODUCTION
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The WM8903 is a high performance ultra-low power stereo CODEC optimised for portable audio
applications. Flexible analogue interfaces and powerful digital signal processing (DSP) make it ideal
for small portable devices.
The WM8903 supports up to 6 analogue audio inputs. One pair of single-ended or differential
microphone/line inputs is selected as the ADC input source. An integrated bias reference is provided
to power standard electret microphones.
A two-channel digital microphone interface is also supported, with direct input to the DSP core
bypassing the ADCs.
Two pairs of ground-referenced Class-W headphone / line outputs are provided; these are powered
from an integrated Charge Pump, enabling high quality, power efficient headphone playback without
any requirement for DC blocking capacitors. A DC Servo circuit is available for DC offset correction,
thereby suppressing pops and reducing power consumption. Two differential line outputs are also
provided; these are also capable of driving external speaker drivers. Ground loop feedback is
available on the ground-referenced headphone and line outputs, providing rejection of noise on the
ground connections. All outputs use Wolfson SilentSwitch™ technology for pop and click
suppression.
The stereo ADCs and DACs are of hi-fi quality, using a 24-bit low-order oversampling architecture to
deliver optimum performance. A high pass filter is available in the ADC path for removing DC offsets
and suppressing low frequency noise such as mechanical vibration and wind noise. A digital mixing
path from the ADC to the DAC provides a sidetone of enhanced quality during voice calls. DAC soft
mute and un-mute is available for pop-free music playback.
The integrated Dynamic Range Controller (DRC) provides further processing capability of the digital
audio paths. The DRC provides compression and signal level control to improve the handling of
unpredictable signal levels. ‘Anti-clip’ and ‘quick release’ algorithms improve intelligibility in the
presence of transients and impulsive noises.
The WM8903 has a highly flexible digital audio interface, supporting a number of protocols, including
I2S, DSP, MSB-first left/right justified, and can operate in master or slave modes. PCM operation is
supported in the DSP mode. A-law and μ-law companding are also supported. Time division
multiplexing (TDM) is available to allow multiple devices to stream data simultaneously on the same
bus, saving space and power.
The system clock CLK_SYS provides clocking for the ADCs, DACs, DSP core, digital audio interface
and other circuits. CLK_SYS can be derived directly from the MCLK pin or via an integrated FLL,
providing flexibility to support a wide range of clocking schemes. Typical portable system MCLK
frequencies, and sample rates from 8kHz to 96kHz are all supported. The clocking circuits are
configured automatically from the sample rate (fs) and from the CLK_SYS / fs ratio.
The integrated FLL can be used to generate CLK_SYS from a wide variety of different reference
sources and frequencies. The FLL can accept a wide range of reference frequencies, which may be
high frequency (e.g. 13MHz) or low frequency (eg. 32.768kHz). The FLL is tolerant of jitter and may
be used to generate a stable CLK_SYS from a less stable input signal. The integrated FLL can be
used as a free-running oscillator, enabling autonomous clocking of the Charge Pump and DC Servo
if required.
The WM8903 uses a standard 2-wire control interface, providing full software control of all features,
together with device register readback. An integrated Control Write Sequencer enables automatic
scheduling of control sequences; commonly-used signal configurations may be selected using ready-
programmed sequences, including time-optimised control of the WM8903 pop suppression features.
It is an ideal partner for a wide range of industry standard microprocessors, controllers and DSPs.
Unused circuitry can be disabled under software control, in order to save power; low leakage currents
enable extended standby/off time in portable battery-powered applications.
Up to 5 GPIO pins may be configured for miscellaneous input/output functions such as
button/accessory detect inputs, or for clock, system status, or programmable logic level output for
control of additional external circuitry. Interrupt logic, status readback and de-bouncing options are
supported within this functionality.
PD, Rev 4.0, September 2010
WM8903
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