WM8903LGEFK/RV Wolfson Microelectronics, WM8903LGEFK/RV Datasheet - Page 121

• Manufacturer Part Number: WM8903LGEFK/RV
• Description: Audio CODECs ULTRA LOW PWR HI FI CODEC
• Manufacturer: Wolfson Microelectronics

Specifications of WM8903LGEFK/RV

• Audio Codec Type: Stereo Codec
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 6
• No. Of Output Channels: 8
• Adc / Dac Resolution: 24bit
• Sampling Rate: 96kHz
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Adcs / Dacs Signal To Noise Ratio: 96dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
w
Note that a ‘Dummy’ write can be inserted into a control sequence by commanding the sequencer to
write a value of 0 to bit 0 of Register R255 (FFh). This is effectively a write to a non-existent register
location. This can be used in order to create placeholders ready for easy adaptation of the sequence.
For example, a sequence could be defined to power-up a mono signal path from DACL to
headphone, with a ‘dummy’ write included to leave space for easy modification to a stereo signal
path configuration. Dummy writes can also be used in order to implement additional time delays
between register writes. Dummy writes are included in the default start-up sequence – see Table 79.
In summary, the Control Register to be written is set by the WSEQ_ADDR field. The data bits that
are written are determined by a combination of WSEQ_DATA_START, WSEQ_DATA_WIDTH and
WSEQ_DATA. This is illustrated below for an example case of writing to the VMID_RES field within
Register R5 (05h).
In this example, the Start Position is bit 01 (WSEQ_DATA_START = 0001b) and the Data width is 2
bits (WSEQ_DATA_WIDTH = 0001b). With these settings, the Control Write Sequencer would
updated the Control Register R5 [2:1] with the contents of WSEQ_DATA [1:0].
Figure 64 Control Write Sequencer Example
DEFAULT SEQUENCES
When the WM8903 is powered up, two Control Write Sequences are available through default
settings in both RAM and ROM memory locations. The purpose of these sequences, and the register
write required to initiate them, is summarised in Table 78. In both cases, a single register write will
initiate the sequence.
Table 78 Write Sequencer Default Sequences
Note on Shut-Down sequence: The instruction at Index Address 32 (20h) shorts the outputs
LINEOUTL and LINEOUTR. If the Line outputs are not in use at the time the sequence is run, then
the sequence could, instead, be started at Index Address 33.
WSEQ START
32 (20h)
0 (00h)
INDEX
WSEQ FINISH
29 (1Dh)
48 (30h)
INDEX
Shutdown sequence
Start-Up sequence
PURPOSE
PD, Rev 4.0, September 2010
Register R111 (6Fh)
Register R111 (6Fh)
Write 0100h to
Write 0120h to
TO INITIATE
WM8903
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