LAN9303MI-AKZE Standard Microsystems (SMSC), LAN9303MI-AKZE Datasheet - Page 157

• Manufacturer Part Number: LAN9303MI-AKZE
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9303MI-AKZE

• Lead Free Status / Rohs Status: Compliant

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
SMSC LAN9303M/LAN9303Mi
13.2.2.4
31:10
BITS
9:8
7:6
5:0
RESERVED
LED Function 1-0 (LED_FUN[1:0])
These bits control the function associated with each LED pin as shown in
Table 12.1
Note:
RESERVED
LED Enable 5-0 (LED_EN[5:0])
This field toggles the functionality of the GPIO[5:0] pins between GPIO and
LED.
0: Enables the associated pin as a GPIO signal
1: Enables the associated pin as a LED output
When configured as LED outputs, the pins are either push-pull or open-
drain/open-source outputs and the pull-ups and input buffers are disabled.
Push-pull is selected when LED_FUN[1:0] = 11b, otherwise, they are open-
drain/open-source. When open-drain/open-source, the polarity of the pins
depends upon the strap value sampled at reset. If a high is sampled at reset,
then this signal is active low.
Note:
When configured as a GPIO output, the pins are configured per the
Purpose I/O Configuration Register (GPIO_CFG)
I/O Data & Direction Register
does not depend upon the strap value sampled at reset.
LED Configuration Register (LED_CFG)
This read/write register configures the GPIO[5:0] pins as LED[5:0] pins and sets their functionality.
Note 13.2 The default value of this field is determined by the configuration strap LED_fun_strap[1:0]].
Note 13.3 The default value of this field is determined by the configuration strap LED_en_strap[5:0].
In order for these assignments to be valid, the particular pin must
be enabled as an LED output pin via the LED_EN[5:0] bits of this
register.
The polarity is determined by the strap value sampled on reset (a
hard-strap) and not the soft-strap value (of the shared strap) set via
EEPROM.
of
Offset:
Section 12.3, "LED Operation," on page
Configuration strap values are latched on power-on reset or nRST de-assertion. Some
configuration straps can be overridden by values from the EEPROM Loader. Refer to
Section 4.2.4, "Configuration Straps," on page 51
Configuration strap values are latched on power-on reset or nRST de-assertion. Some
configuration straps can be overridden by values from the EEPROM Loader. Refer to
Section 4.2.4, "Configuration Straps," on page 51
1BCh
DESCRIPTION
(GPIO_DATA_DIR). The polarity of the pins
DATASHEET
157
and the
Size:
143.
General Purpose
for more information.
for more information.
32 bits
General
TYPE
R/W
R/W
RO
RO
Revision 1.4 (07-07-10)
DEFAULT
Note 13.2
Note 13.3
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