LAN9303MI-AKZE Standard Microsystems (SMSC), LAN9303MI-AKZE Datasheet - Page 214

• Manufacturer Part Number: LAN9303MI-AKZE
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9303MI-AKZE

• Lead Free Status / Rohs Status: Compliant

Revision 1.4 (07-07-10)
autoneg_strap_x
0
0
1
1
Table 13.10 10BASE-T Half Duplex Advertisement Bit Default Value
Port 1 PHY,
this bit. Configuration strap values are latched upon the de-assertion of a chip-level reset
as described in
"Configuration Straps," on page 51
speed_strap_x
0
1
0
1
speed_strap_2
Section 4.2.4, "Configuration Straps," on page
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
DATASHEET
for Port 2 PHY).
214
for configuration strap definitions.
Default 10BASE-T Half Duplex Value
Table 13.10
1
0
1
1
defines the default behavior of
SMSC LAN9303M/LAN9303Mi
51. Refer to
Section 4.2.4,
Datasheet