LAN9303MI-AKZE Standard Microsystems (SMSC), LAN9303MI-AKZE Datasheet - Page 177

• Manufacturer Part Number: LAN9303MI-AKZE
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9303MI-AKZE

• Lead Free Status / Rohs Status: Compliant

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
SMSC LAN9303M/LAN9303Mi
13.2.5
13.2.5.1
31:16
BITS
15:0
RESERVED
MII Data
This field contains the value read from or written to the PHYs. For a write
operation, this register should be first written with the desired data. For a
read operation, the PMI_ACCESS register is first written and once the
command is finished, this register will contain the return data.
Note:
PHY Management Interface (PMI)
The PMI registers are used to indirectly access the PHY registers. Refer to
PHY Control and Status Registers," on page 204
to
Note: The Virtual PHY registers are NOT accessible via these registers.
PHY Management Interface Data Register (PMI_DATA)
This register is used in conjunction with the
(PMI_ACCESS)
Note: The Virtual PHY registers are NOT accessible via these registers.
Section 10.3, "PHY Management Interface (PMI)," on page 136
Upon a read, the value returned depends on the
(MIIWnR)
(PMI_ACCESS). If
PHY. If
written into this register.
Offset:
MII Write (MIIWnR)
to perform read and write operations to the PHYs.
bit in the
MII Write (MIIWnR)
PHY Management Interface Access Register
0A4h
DESCRIPTION
is 1, the data is the value that was last
DATASHEET
177
is 0, the data is from the
Size:
for additional information on the PHY registers. Refer
PHY Management Interface Access Register
MII Write
32 bits
for information on the PMI.
TYPE
R/W
Section 13.3, "Ethernet
RO
Revision 1.4 (07-07-10)
DEFAULT
0000h
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