LAN9303MI-AKZE Standard Microsystems (SMSC), LAN9303MI-AKZE Datasheet - Page 286
LAN9303MI-AKZE
Manufacturer Part Number
LAN9303MI-AKZE
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9303MI-AKZE.pdf
(381 pages)
Specifications of LAN9303MI-AKZE
Lead Free Status / Rohs Status
Compliant
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Revision 1.4 (07-07-10)
13.4.3.2
BITS
31:0
MAC Address
This field contains the first 32 bits of the ALR entry that will be written into
the ALR table. These bits correspond to the first 32 bits of the MAC address.
Bit 0 holds the LSB of the first byte (the multicast bit).
Switch Engine ALR Write Data 0 Register (SWE_ALR_WR_DAT_0)
This register is used in conjunction with the
(SWE_ALR_WR_DAT_1)
Entry command in the
Register #:
Switch Engine ALR Command Register
and contains the first 32 bits of ALR data to be manually written via the Make
1801h
DESCRIPTION
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
DATASHEET
286
Size:
Switch Engine ALR Write Data 1 Register
32 bits
(SWE_ALR_CMD).
SMSC LAN9303M/LAN9303Mi
TYPE
R/W
00000000h
DEFAULT
Datasheet
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