LAN9303MI-AKZE Standard Microsystems (SMSC), LAN9303MI-AKZE Datasheet - Page 29

• Manufacturer Part Number: LAN9303MI-AKZE
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9303MI-AKZE

• Lead Free Status / Rohs Status: Compliant

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
SMSC LAN9303M/LAN9303Mi
PINS
NUM
1
1
Port 1 Mode[0]
Output Data 0
Configuration
Output Data
Port 1 MII
Port 1 MII
NAME
Strap
Valid
P1_MODE0
P1_OUTDV
P1_OUTD0
SYMBOL
Table 3.4 Port 1 MII/RMII Pins (continued)
DATASHEET
BUFFER
Note 3.5
TYPE
(PU)
O8
O8
O8
O8
O8
O8
IS
-
-
29
MII MAC Mode: This pin is the transmit data 0 bit
from the switch to the external PHY.
MII PHY Mode: This pin is the receive data 0 bit
from the switch to the external MAC. The output
driver is disabled when the
Port 1 MII Basic Control Register
(P1_MII_BASIC_CONTROL).
RMII PHY Mode: This pin is the receive data 0 bit
from the switch to the external MAC. The output
driver is disabled when the
Port 1 MII Basic Control Register
(P1_MII_BASIC_CONTROL).
Internal PHY Mode: This pin is not used.
This strap configures the mode for the Port 1 MII
pins. See
The P1_MODE[2:0] configuration strap encoding is
as follows:
000 = MII MAC mode
001 = MII PHY mode
010 = MII PHY mode 200 Mbps 12 ma clock output
011 = MII PHY mode 200 Mbps 16 ma clock output
100 = RMII PHY mode clock is 12 ma output
101 = RMII PHY mode clock is 16 ma output
110 = RMII PHY mode clock is input
111 = Internal PHY mode
MII MAC Mode: This pin is the TX_EN signal to the
external PHY and indicates valid data on
P1_OUTD[3:0].
MII PHY Mode: This pin is the RX_DV signal to the
external MAC. The output driver is disabled when
the
Register
RMII PHY Mode: This pin is the CRS_DV signal to
the external MAC. The output driver is disabled
when the
Control Register
Internal PHY Mode: This pin is not used.
Isolate
(P1_MII_BASIC_CONTROL).
Isolate
Note
bit is set in the
3.4.
(P1_MII_BASIC_CONTROL).
bit is set in the
DESCRIPTION
Port 1 MII Basic Control
Isolate
Isolate
Revision 1.4 (07-07-10)
Port 1 MII Basic
bit is set in the
bit is set in the