LAN9303MI-AKZE Standard Microsystems (SMSC), LAN9303MI-AKZE Datasheet - Page 34

no-image

LAN9303MI-AKZE

Manufacturer Part Number
LAN9303MI-AKZE
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9303MI-AKZE

Lead Free Status / Rohs Status
Compliant
Revision 1.4 (07-07-10)
PINS
NUM
1
1
Port 0 Mode[2]
Port 0 Mode[1]
Output Data 2
Output Data 1
Configuration
Configuration
Port 0 MII
Port 0 MII
NAME
Strap
Strap
P0_MODE2
P0_MODE1
P0_OUTD2
P0_OUTD1
SYMBOL
Table 3.5 Port 0 MII/RMII Pins (continued)
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
DATASHEET
BUFFER
Note 3.7
Note 3.7
TYPE
(PU)
(PU)
O8
O8
O8
O8
O8
IS
IS
-
34
MII MAC Mode: This pin is the transmit data 2 bit
from the switch to the external PHY.
MII PHY Mode: This pin is the receive data 2 bit
from the switch to the external MAC. The output
driver is disabled when the
is set in the
(VPHY_BASIC_CTRL).
RMII PHY Mode: This pin is not used
This strap configures the mode for Port 0. See
Note
Please refer to the
mode encoding details.
MII MAC Mode: This pin is the transmit data 1 bit
from the switch to the external PHY.
MII PHY Mode: This pin is the receive data 1 bit
from the switch to the external MAC. The output
driver is disabled when the
is set in the
(VPHY_BASIC_CTRL).
RMII PHY Mode: This pin is the receive data 1 bit
from the switch to the external MAC. The output
driver is disabled when the
is set in the
(VPHY_BASIC_CTRL).
This strap configures the mode for Port 0. See
Note
Please refer to the
mode encoding details.
3.6.
3.6.
Virtual PHY Basic Control Register
Virtual PHY Basic Control Register
Virtual PHY Basic Control Register
DESCRIPTION
P0_MODE0
P0_MODE0
SMSC LAN9303M/LAN9303Mi
Isolate (VPHY_ISO)
Isolate (VPHY_ISO)
Isolate (VPHY_ISO)
strap entry for
strap entry for
Datasheet
bit
bit
bit

Related parts for LAN9303MI-AKZE