ADSP-21362WBBCZ-1A AD [Analog Devices], ADSP-21362WBBCZ-1A Datasheet - Page 23

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ADSP-21362WBBCZ-1A

Manufacturer Part Number
ADSP-21362WBBCZ-1A
Description
SHARC Processor
Manufacturer
AD [Analog Devices]
Datasheet
Timer WDTH_CAP Timing
The following timing specification applies to Timer0, Timer1,
and Timer2 in WDTH_CAP (pulse width count and capture)
mode. Timer signals are routed to the DAI_P20–1 pins through
the SRU. Therefore, the timing specification provided below are
valid at the DAI_P20–1 pins.
Table 18. Timer Width Capture Timing
DAI Pin to Pin Direct Routing
For direct pin connections only (for example, DAI_PB01_I to
DAI_PB02_O).
Table 19. DAI Pin to Pin Routing
Parameter
Timing Requirement
t
Parameter
Timing Requirement
t
PWI
DPIO
Timer Pulse Width
Delay DAI Pin Input Valid to DAI Output Valid
ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
(TIMER2-0)
DAI_P20-1
DAI_Pm
DAI_Pn
Figure 14. Timer Width Capture Timing
Figure 15. DAI Pin to Pin Direct Routing
Rev. A | Page 23 of 52 | December 2006
Min
2 t
PCLK
t
PWI
t
DPIO
Min
1.5
Max
2(2
31
– 1) t
PCLK
Max
10
Unit
ns
Unit
ns

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