dsPIC33FJ32GP104-I/PT Microchip Technology, dsPIC33FJ32GP104-I/PT Datasheet - Page 125

• Manufacturer Part Number: dsPIC33FJ32GP104-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Gen Prp Fam16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32GP104-I/PT

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

8.0
FIGURE 8-1:
 2011-2012 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
Note 1:
R
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
SOSCO
(1)
SOSCI
2: Some registers and associated bits
OSCILLATOR
CONFIGURATION
2:
OSC1
OSC2
TUN<5:0>
of
and dsPIC33FJ32(GP/MC)101/102/104
family devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 52. “Oscillator
(Part VI)” (DS70644) in the “dsPIC33F/
PIC24H Family Reference Manual”,
which is available from the Microchip web
site (www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
Oscillator
If the oscillator is used with MS or HS modes, an extended parallel resistor with the value of 1 M must be connected.
The term, F
ment, F
used with a Doze ratio of 1:2 or lower.
FRC
Primary Oscillator (POSC)
Secondary Oscillator (SOSC)
the
POSCMD<1:0>
CY
Oscillator
and F
P
LPRC
dsPIC33FJ16(GP/MC)101/102
OSCILLATOR SYSTEM DIAGRAM
, refers to the clock source for all peripherals, while F
P
are used interchangeably, except in the case of Doze mode. F
LPOSCEN
S3
S1
÷ 16
FRCDIV<2:0>
4x PLL
in
MSPLL, ECPLL,
Clock Fail
MS, HS, EC
FRCDIV16
The oscillator system for dsPIC33FJ16(GP/MC)101/
102 and dsPIC33FJ32(GP/MC)101/102/104 devices
provides:
• External and internal oscillator options as clock
• An on-chip, 4x Phase Lock Loop (PLL) to scale the
• An internal FRC oscillator that can also be used with
• Clock switching between various clock sources
• Programmable clock postscaler for system power
• A Fail-Safe Clock Monitor (FSCM) that detects clock
• A Clock Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
A simplified diagram of the oscillator system is shown
in
FRCDIVN
S7
CY
FRCPLL
sources
internal operating frequency to the required system
clock frequency
the PLL, thereby allowing full-speed operation
without any external clock generation hardware
savings
failure and takes fail-safe measures
selection
Figure
refers to the clock source for the CPU. Throughout this docu-
SOSC
LPRC
FRC
Clock Switch
NOSC<2:0>
8-1.
S2
S1/S3
S7
S6
S0
S5
S4
P
and F
CY
FNOSC<2:0>
÷ 2
will be different when Doze mode is
Reset
DOZE<2:0>
WDT, PWRT,
DS70652E-page 125
(To Peripherals)
Timer 1
FSCM
F
F
CY (2)
F
OSC
P (2)