dsPIC33FJ32GP104-I/PT Microchip Technology, dsPIC33FJ32GP104-I/PT Datasheet - Page 367

• Manufacturer Part Number: dsPIC33FJ32GP104-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Gen Prp Fam16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32GP104-I/PT

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

APPENDIX A:
Revision A (January 2011)
This is the initial released version of the document.
Revision B (February 2011)
All major changes are referenced by their respective
section in
In addition, minor text and formatting changes were
incorporated throughout the document.
TABLE A-1:
 2011-2012 Microchip Technology Inc.
High-Performance, Ultra Low Cost 16-bit
Digital Signal Controllers
Section 1.0 “Device Overview”
Section 4.0 “Memory Organization”
Section 6.0 “Resets”
Section 15.0 “Motor Control PWM Module” Added Note 2 and Note 3 regarding the FLTA1 and FLTB1 pins to the
Section 17.0 “Inter-Integrated Circuit™
(I
Section 23.0 “Special Features”
Section 26.0 “Electrical Characteristics”
Section 27.0 “Packaging Information”
2
C™)”
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
Table
Section Name
A-1.
MAJOR SECTION UPDATES
REVISION HISTORY
Pin diagram updates (see “Pin Diagrams”):
• 20-pin PDIP/SOIC/SSOP (dsPIC33FJ16MC101):
• 28-pin SPDIP/SOIC/SSOP (dsPIC33FJ16MC102):
• 28-pin QFN (dsPIC33FJ16MC102):
• 36-pin TLA (dsPIC33FJ16MC102):
Added Notes 1, 2, and 3 regarding the FLTA1 and FLTB1 pins to the
Pinout I/O Descriptions (see Table 1-1).
Added Section “”.
Updated All Resets value for PxFLTACON and PxFLTABCON to the
6-Output PWM1 Register Map (see Table 4-9).
Added Note 1 to the PMD Register Map (see Table 4-29).
Removed Reset timing sequence information from Section 6.2
“System Reset”, as this information is provided in Figure 6-2.
6-channel PWM Module Block Diagram (see Figure 15-1).
Added Section 15.2 “PWM Faults” and Section 15.3 “Write-
protected Registers”.
Added Note 2 and Note 3 regarding the FLTA1 and FLTB1 pins to the
note boxes located below the PxFLTACON and PxFLTBCON
registers (see Register 15-9 and Register 15-10).
Updated the descriptions for the conditional If STREN = 1 and If
STREN = 0 statements for the SCLREL bit in the I2Cx Control
Register (see Register 17-1).
Added the RTSP Effect column to the dsPIC33F Configuration Bits
Description (see Table 23-3).
Added Parameters 300 and D305 (see Table 26-42 and Table 26-43).
Modified the pending TLA packaging page.
Removed the FLTB1 pin from pin 10
Relocated the FLTB1 pin from pin 12 to pin 14;
relocated the FLTA1 pin from pin 16 to pin 15
Relocated the FLTA1 pin from pin 13 to pin 12;
relocated the FLTB1 pin from pin 9 to pin 11
Relocated the FLTA1 pin from pin 17 to pin 16;
relocated the FLTB1 pin from pin 10 to pin 15
Update Description
DS70652E-page 367