dsPIC33FJ32GP104-I/PT Microchip Technology, dsPIC33FJ32GP104-I/PT Datasheet - Page 368

• Manufacturer Part Number: dsPIC33FJ32GP104-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Gen Prp Fam16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32GP104-I/PT

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
Revision C (June 2011)
This revision includes the following global update:
• All JTAG references have been removed
All other major changes are referenced by their
respective section in
In addition, minor text and formatting changes were
incorporated throughout the document.
TABLE A-2:
DS70652E-page 368
High-Performance, Ultra Low Cost
16-bit Digital Signal Controllers
Section 1.0 “Device Overview”
Section 4.0 “Memory Organization”
Section 6.0 “Resets”
Section 8.0 “Oscillator Configuration” Updated the definition for COSC<2:0> = 001 and NOSC<2:0> = 001 in
Section 15.0 “Motor Control PWM
Module”
Section 19.0 “10-bit Analog-to-Digital
Converter (ADC)”
Section 22.0 “Charge Time
Measurement Unit (CTMU)”
Section Name
MAJOR SECTION UPDATES
Table
A-2.
The TMS, TDI, TDO, and TCK pin names were removed from these pin
diagrams:
• 28-pin SPDIP/SOIC/SSOP
• 28-pin QFN
• 36-pin TLA
Updated the Buffer Type to Digital for the CTED1 and CTED2 pins (see
Table 1-1).
Updated the SFR Address for IC2CON, IC3BUF, and IC3CON in the Input
Capture Register Map (see Table 4-7).
Added the VREGS bit to the RCON register in the System Control Register
Map (see Table 4-27).
Added the VREGS bit to the RCON register (see Register 6-1).
the OSCCON register (see Register 8-1).
Updated the title for Example 15-1 to include a reference to the Assembly
language.
Added Example 15-2, which provides a C code version of the write-
protected register unlock and Fault clearing sequence.
Updated the CH0 section and added Note 2 in both ADC block diagrams
(see Figure 19-1 and Figure 19-2).
Updated the multiplexer values in the ADC Conversion Clock Period Block
Diagram (see Figure 19-3.
Added the 01110 bit definitions and updated the 01101 bit definitions for
the CH0SB<4:0> and CH0SA<4:0> bits in the AD1CHS0 register (see
Register 19-5).
Removed Section 22.1 “Measuring Capacitance”, Section 22.2 “Measuring
Time”, and Section 22.3 “Pulse Generation and Delay”
Updated the key features.
Added the CTMU Block Diagram (see Figure 22-1).
Updated the ITRIM<5:0> bit definitions and added Note 1 to the CTMU
Current Control register (see Register 22-3).
Update Description
 2011-2012 Microchip Technology Inc.