dsPIC33FJ32GP104-I/PT Microchip Technology, dsPIC33FJ32GP104-I/PT Datasheet - Page 30

• Manufacturer Part Number: dsPIC33FJ32GP104-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Gen Prp Fam16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32GP104-I/PT

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
TABLE 1-1:
DS70652E-page 30
SCL1
SDA1
ASCL1
ASDA1
FLTA1
FLTB1
PWM1L1
PWM1H1
PWM1L2
PWM1H2
PWM1L3
PWM1H3
RTCC
CTPLS
CTED1
CTED2
CV
CV
C1INA
C1INB
C1INC
C1IND
C1OUT
C2INA
C2INB
C2INC
C2IND
C2OUT
C3INA
C3INB
C3INC
C3IND
C3OUT
PGED1
PGEC1
PGED2
PGEC2
PGED3
PGEC3
MCLR
Legend: CMOS = CMOS compatible input or output
Note 1:
Pin Name
REFIN
REFOUT
2:
3:
4:
5:
6:
(1,2,4)
(3,4)
ST = Schmitt Trigger input with CMOS levels
PPS = Peripheral Pin Select
An external pull-down resistor is required for the FLTA1 pin on dsPIC33FJXXMC101 (20-pin) devices.
The FLTA1 pin and the PWM1Lx/PWM1Hx pins are available in dsPIC(16/32)MC10X devices only.
The FLTB1 pin is available in dsPIC(16/32)MC102/104 devices only.
The PWM Fault pins are enabled during any Reset event. Refer to
information on the PWM Faults.
Not all pins are available on all devices. Refer to the specific device in the
availability.
This pin is available in dsPIC33FJ32(GP/MC)104 (44-pin) devices only.
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/P
O
O
O
O
O
O
O
O
O
O
O
O
PINOUT I/O DESCRIPTIONS (CONTINUED)
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Buffer
Digital
Digital
Digital
Digital
Digital
Digital
Digital
Type
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
—
PPS
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
Synchronous serial clock input/output for I2C1.
Synchronous serial data input/output for I2C1.
Alternate synchronous serial clock input/output for I2C1.
Alternate synchronous serial data input/output for I2C1.
PWM1 Fault A input.
PWM1 Fault B input.
PWM1 Low Output 1
PWM1 High Output 1
PWM1 Low Output 2
PWM1 High Output 2
PWM1 Low Output 3
PWM1 High Output 3
RTCC Alarm output.
CTMU pulse output.
CTMU External Edge Input 1.
CTMU External Edge Input 2.
Comparator Voltage Positive Reference Input.
Comparator Voltage Positive Reference Output.
Comparator 1 Positive Input A.
Comparator 1 Negative Input B.
Comparator 1 Negative Input C.
Comparator 1 Negative Input D.
Comparator 1 Output.
Comparator 2 Positive Input A.
Comparator 2 Negative Input B.
Comparator 2 Negative Input C.
Comparator 2 Negative Input D.
Comparator 2 Output.
Comparator 3 Positive Input A.
Comparator 3 Negative Input B.
Comparator 3 Negative Input C.
Comparator 3 Negative Input D.
Comparator 3 Output.
Data I/O pin for Programming/Debugging Communication Channel 1.
Clock input pin for Programming/Debugging Communication Channel 1.
Data I/O pin for Programming/Debugging Communication Channel 2.
Clock input pin for Programming/Debugging Communication Channel 2.
Data I/O pin for Programming/Debugging Communication Channel 3.
Clock input pin for Programming/Debugging Communication Channel 3.
Master Clear (Reset) input. This pin is an active-low Reset to the device.
Analog = Analog input
O = Output
Description
Section 15.2 “PWM Faults”
 2011-2012 Microchip Technology Inc.
“Pin Diagrams”
P = Power
I = Input
section for
for more