dsPIC33FJ32GP104-I/PT Microchip Technology, dsPIC33FJ32GP104-I/PT Datasheet - Page 261

• Manufacturer Part Number: dsPIC33FJ32GP104-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Gen Prp Fam16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32GP104-I/PT

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

TABLE 23-4:
 2011-2012 Microchip Technology Inc.
GCP
GWRP
IESO
PWMLOCK
WDTWIN<1:0>
FNOSC<2:0>
FCKSM<1:0>
IOL1WAY
OSCIOFNC
POSCMD<1:0>
FWDTEN
WINDIS
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
Bit Field
dsPIC33F CONFIGURATION BITS DESCRIPTION
General Segment Code-Protect bit
1 = User program memory is not code-protected
0 = Code protection is enabled for the entire program memory space
General Segment Write-Protect bit
1 = User program memory is not write-protected
0 = User program memory is write-protected
Two-Speed Oscillator Start-up Enable bit
1 = Starts up device with FRC, then automatically switches to the user-selected oscillator source
0 = Starts up device with user-selected oscillator source
PWM Lock Enable bit
1 = Certain PWM registers may only be written after key sequence
0 = PWM registers may be written without a key sequence
Watchdog Timer Window Select bits
11 = WDT window is 24% of WDT period
10 = WDT window is 37.5% of WDT period
01 = WDT window is 50% of WDT period
00 = WDT window is 75% of WDT period
Oscillator Selection bits
111 = Fast RC Oscillator with Divide-by-N (FRCDIVN)
110 = Reserved; do not use
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (MS + PLL, EC + PLL)
010 = Primary Oscillator (MS, HS, EC)
001 = Fast RC Oscillator with Divide-by-N and PLL module (FRCDIVN + PLL)
000 = Fast RC Oscillator (FRC)
Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Peripheral Pin Select Configuration bit
1 = Allow only one reconfiguration
0 = Allow multiple reconfigurations
OSC2 Pin Function bit (except in MS and HS modes)
1 = OSC2 is clock output
0 = OSC2 is general purpose digital I/O pin
Primary Oscillator Mode Select bits
11 = Primary Oscillator is disabled
10 = HS Crystal Oscillator mode (10 MHz-32 MHz)
01 = MS Crystal Oscillator mode (3 MHz-10 MHz)
00 = EC (External Clock) mode (DC-32 MHz)
Watchdog Timer Enable bit
1 = Watchdog Timer is always enabled (LPRC oscillator cannot be disabled; clearing the SWDTEN
0 = Watchdog Timer is enabled/disabled by user software (LPRC can be disabled by clearing the
Watchdog Timer Window Enable bit
1 = Watchdog Timer in Non-Window mode
0 = Watchdog Timer in Window mode
when ready
bit in the RCON register will have no effect)
SWDTEN bit in the RCON register)
Description
DS70652E-page 261