dsPIC33FJ32GP104-I/PT Microchip Technology, dsPIC33FJ32GP104-I/PT Datasheet - Page 49

• Manufacturer Part Number: dsPIC33FJ32GP104-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Gen Prp Fam16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32GP104-I/PT

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

4.0
The device architecture features separate program and
data memory spaces and buses. This architecture also
allows the direct access of program memory from the
data space during code execution.
FIGURE 4-1:
 2011-2012 Microchip Technology Inc.
Note:
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
MEMORY ORGANIZATION
Note 1:
This data sheet summarizes the features
of the dsPIC33FJ16(GP/MC)101/102 and
dsPIC33FJ32(GP/MC)101/102/104 family
devices. However, it is not intended to be
a comprehensive reference source. To
complement the information in this data
sheet, refer to Section 3. “Data Memory”
(DS70202) and Section 4. “Program
Memory” (DS70203) in the “dsPIC33F/
PIC24H Family Reference Manual”, which
are available from the Microchip web site
(www.microchip.com).
On Reset, these bits are automatically copied into the device Configuration Shadow registers.
PROGRAM MEMORY MAP FOR dsPIC33FJ16(GP/MC)101/102 DEVICES
Alternate Vector Table
Interrupt Vector Table
Device Configuration
Flash Configuration
(5.6K instructions)
Shadow Registers
GOTO Instruction
Unimplemented
Reset Address
Flash Memory
User Program
(Read ‘0’s)
DEVID (2)
Reserved
Reserved
Reserved
Words
(1)
4.1
The
dsPIC33FJ16(GP/MC)101/102 and dsPIC33FJ32(GP/
MC)101/102/104 devices is 4M instructions. The space
is addressable by a 24-bit value derived either from the
23-bit Program Counter (PC) during program execution,
or from table operation or data space remapping as
described in
Data Memory
User application access to the program memory space
is restricted to the lower half of the address range
(0x000000 to 0x7FFFFF). The exception is the use of
TBLRD/TBLWT operations, which use TBLPAG<7> to
permit access to the Configuration bits and Device ID
sections of the configuration memory space.
The memory maps for the dsPIC33FJ16(GP/MC)101/
102 and dsPIC33FJ32(GP/MC)101/102/104 family of
devices re shown in
program
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
0x002BFA
0x002BFC
0x002BFE
0x002COO
0x7FFFFE
0x800000
0xF7FFFE
0xF80000
0xF80017
0xF80018
0xFEFFFE
0xFF0000
0xFFFFFE
Program Address Space
Section 4.6 “Interfacing Program and
Spaces”.
address
Figure 4-1
memory
and
Figure
DS70652E-page 49
space
4-2.
of
the