PIC18F27J13-I/SP Microchip Technology, PIC18F27J13-I/SP Datasheet - Page 114

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PIC18F27J13-I/SP

Manufacturer Part Number
PIC18F27J13-I/SP
Description
IC PIC MCU 128KB FLASH 28SPDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SP

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
DIP
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Data Ram Size
3.76 KB
On-chip Adc
Yes
Number Of Programmable I/os
2
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
A/d Bit Size
12 bit
A/d Channels Available
10
Height
3.43 mm
Interface Type
I2C, SPI, USART
Length
34.4 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.15 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC18(L)F2X/4XK22
instructions. Individual interrupt flag bits are set,
regardless of the status of their corresponding enable
bits or the Global Interrupt Enable bit.
FIGURE 9-1:
DS41412D-page 114
Note:
High Priority Interrupt Generation
Low Priority Interrupt Generation
Note 1:
Do not use the MOVFF instruction to mod-
ify any of the interrupt control registers
while any interrupt is enabled. Doing so
may cause erratic microcontroller behav-
ior.
The RBIF interrupt also requires the individual pin IOCB enables.
PIC18 INTERRUPT LOGIC
PIR1<6:0>
PIE1<6:0>
IPR1<6:0>
PIR2<7:0>
PIE2<7:0>
PIR4<2:0>
PIE4<2:0>
PIR5<2:0>
PIE5<2:0>
IPR5<2:0>
PIR1<6:0>
PIE1<6:0>
IPR1<6:0>
IPR2<7:0>
PIR3<7:0>
PIE3<7:0>
IPR3<7:0>
IPR4<2:0>
PIR2<7:0>
PIE2<7:0>
IPR2<7:0>
PIR3<7:0>
PIE3<7:0>
IPR3<7:0>
PIR4<2:0>
PIE4<2:0>
IPR4<2:0>
PIR5<2:0>
PIE5<2:0>
IPR5<2:0>
Preliminary
TMR0IF
TMR0IE
TMR0IP
TMR0IF
TMR0IE
TMR0IP
INT1IF
INT1IE
INT1IP
INT2IF
INT2IE
INT2IP
INT0IF
INT0IE
INT1IE
INT1IP
INT2IE
INT2IP
INT1IF
INT2IF
RBIF
RBIE
RBIP
RBIF
RBIE
RBIP
IPEN
GIEL/PEIE
(1)
(1)
IPEN
IPEN
 2010 Microchip Technology Inc.
GIEH/GIE
GIEL/PEIE
Idle or Sleep modes
GIEH/GIE
0008h
Wake-up if in
Interrupt to CPU
Vector to Location
Interrupt to CPU
Vector to Location
0018h

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