PIC18F27J13-I/SP Microchip Technology, PIC18F27J13-I/SP Datasheet - Page 354

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PIC18F27J13-I/SP

Manufacturer Part Number
PIC18F27J13-I/SP
Description
IC PIC MCU 128KB FLASH 28SPDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SP

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
DIP
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Data Ram Size
3.76 KB
On-chip Adc
Yes
Number Of Programmable I/os
2
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
A/d Bit Size
12 bit
A/d Channels Available
10
Height
3.43 mm
Interface Type
I2C, SPI, USART
Length
34.4 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.15 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC18(L)F2X/4XK22
REGISTER 24-4:
DS41412D-page 354
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
MCLRE
R/P-1
2:
PIC18(L)F2XK22 devices only.
PIC18(L)F4XK22 devices only.
MCLRE: MCLR Pin Enable bit
1 = MCLR pin enabled; RE3 input pin disabled
0 = RE3 input pin enabled; MCLR disabled
Unimplemented: Read as ‘0’
P2BMX: P2B Input MUX bit
1 = P2B is on RB5
0 = P2B is on RC0
T3CMX: Timer3 Clock Input MUX bit
1 = T3CKI is on RC0
0 = T3CKI is on RB5
HFOFST: HFINTOSC Fast Start-up bit
1 = HFINTOSC starts clocking the CPU without waiting for the oscillator to stabilize
0 = The system clock is held off until the HFINTOSC is stable
CCP3MX: CCP3 MUX bit
1 = CCP3 input/output is multiplexed with RB5
0 = CCP3 input/output is multiplexed with RC6
PBADEN: PORTB A/D Enable bit
1 = ANSELB<5:0> resets to 1, PORTB<5:0> pins are configured as analog inputs on Reset
0 = ANSELB<5:0> resets to 0, PORTB<4:0> pins are configured as digital I/O on Reset
CCP2MX: CCP2 MUX bit
1 = CCP2 input/output is multiplexed with RC1
0 = CCP2 input/output is multiplexed with RB3
CCP3 input/output is multiplexed with RE0
P2B is on RD2
U-0
CONFIG3H: CONFIGURATION REGISTER 3 HIGH
P = Programmable bit
P2BMX
R/P-1
(1)
(2)
T3CMX
R/P-1
Preliminary
U = Unimplemented bit, read as ‘0’
x = Bit is unknown
HFOFST
(2)
(1)
R/P-1
CCP3MX
R/P-1
 2010 Microchip Technology Inc.
PBADEN
R/P-1
CCP2MX
R/P-1
bit 0

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