PIC18F27J13-I/SP Microchip Technology, PIC18F27J13-I/SP Datasheet - Page 211

• Manufacturer Part Number: PIC18F27J13-I/SP
• Description: IC PIC MCU 128KB FLASH 28SPDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SP

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Controller Family/series: PIC18
• Cpu Speed: 48MHz
• Digital Ic Case Style: DIP
• Supply Voltage Range: 1.8V To 5.5V
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Core: PIC
• Processor Series: PIC18F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 48 MHz
• Data Ram Size: 3.76 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 2
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• A/d Bit Size: 12 bit
• A/d Channels Available: 10
• Height: 3.43 mm
• Interface Type: I2C, SPI, USART
• Length: 34.4 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.15 V
• Width: 7.24 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

FIGURE 15-4:
15.2.1 SPI MODE REGISTERS
The MSSPx module has five registers for SPI mode
operation. These are:
• MSSPx STATUS register (SSPxSTAT)
• MSSPx Control register 1 (SSPxCON1)
• MSSPx Control register 3 (SSPxCON3)
• MSSPx Data Buffer register (SSPxBUF)
• MSSPx Address register (SSPxADD)
• MSSPx Shift register (SSPxSR)
SSPxCON1 and SSPxSTAT are the control and
STATUS registers in SPI mode operation. The
SSPxCON1 register is readable and writable. The
lower 6 bits of the SSPxSTAT are read-only. The
upper two bits of the SSPxSTAT are read/write.
In one SPI Master mode, SSPxADD can be loaded
with a value used in the Baud Rate Generator. More
information on the Baud Rate Generator is available in
Section 15.7 “Baud Rate
SSPxSR is the shift register used for shifting data in
and out. SSPxBUF provides indirect access to the
SSPxSR register. SSPxBUF is the buffer register to
which data bytes are written, and from which data
bytes are read.
In receive operations, SSPxSR and SSPxBUF
together create a buffered receiver. When SSPxSR
receives a complete byte, it is transferred to SSPxBUF
and the SSPxIF interrupt is set.
During transmission, the SSPxBUF is not buffered. A
write to SSPxBUF will write to both SSPxBUF and
SSPxSR.
 2010 Microchip Technology Inc.
(Not directly accessible)
SPI Master
SPI MASTER AND MULTIPLE SLAVE CONNECTION
Generator”.
General I/O
General I/O
General I/O
SDOx
SCLK
SDIx
Preliminary
15.2.2 SPI MODE OPERATION
When initializing the SPI, several options need to be
specified. This is done by programming the appropriate
control bits (SSPxCON1<5:0> and SSPxSTAT<7:6>).
These control bits allow the following to be specified:
• Master mode (SCKx is the clock output)
• Slave mode (SCKx is the clock input)
• Clock Polarity (Idle state of SCKx)
• Data Input Sample Phase (middle or end of data
• Clock Edge (output data on rising/falling edge of
• Clock Rate (Master mode only)
• Slave Select mode (Slave mode only)
To enable the serial port, SSPx Enable bit, SSPxEN of
the SSPxCON1 register, must be set. To reset or
reconfigure SPI mode, clear the SSPxEN bit, re-initial-
ize the SSPxCONx registers and then set the SSPxEN
bit. This configures the SDIx, SDOx, SCKx and SSx
pins as serial port pins. For the pins to behave as the
serial port function, some must have their data direction
bits (in the TRIS register) appropriately programmed as
follows:
• SDIx must have corresponding TRIS bit set
• SDOx must have corresponding TRIS bit cleared
• SCKx (Master mode) must have corresponding
• SCKx (Slave mode) must have corresponding
• SSx must have corresponding TRIS bit set
output time)
SCKx)
TRIS bit cleared
TRIS bit set
PIC18(L)F2X/4XK22
SCLK
SDIx
SDOx
SSx
SCLK
SDIx
SDOx
SSx
SCLK
SDIx
SDOx
SSx
SPI Slave
SPI Slave
SPI Slave
#1
#2
#3
DS41412D-page 211