PIC18F27J13-I/SP Microchip Technology, PIC18F27J13-I/SP Datasheet - Page 55

• Manufacturer Part Number: PIC18F27J13-I/SP
• Description: IC PIC MCU 128KB FLASH 28SPDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SP

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Controller Family/series: PIC18
• Cpu Speed: 48MHz
• Digital Ic Case Style: DIP
• Supply Voltage Range: 1.8V To 5.5V
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Core: PIC
• Processor Series: PIC18F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 48 MHz
• Data Ram Size: 3.76 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 2
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• A/d Bit Size: 12 bit
• A/d Channels Available: 10
• Height: 3.43 mm
• Interface Type: I2C, SPI, USART
• Length: 34.4 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.15 V
• Width: 7.24 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 3-3:
 2010 Microchip Technology Inc.
Note 1:
T1OSC or LFINTOSC
Primary Device Clock
2:
3:
4:
(PRI_IDLE mode)
before Wake-up
Clock Source
HFINTOSC
(Sleep mode)
T
required delays (see
Includes both the HFINTOSC 16 MHz source and postscaler derived frequencies.
T
Execution continues during the HFINTOSC stabilization period, T
CSD
OST
None
is the Oscillator Start-up Timer. t
is a required delay when waking from Sleep and all Idle modes and runs concurrently with any other
EXIT DELAY ON WAKE-UP BY RESET FROM SLEEP MODE OR ANY IDLE MODE
(BY CLOCK SOURCES)
(2)
(1)
Section 3.4 “Idle
after Wake-up
Clock Source
HFINTOSC
HFINTOSC
HFINTOSC
HFINTOSC
LP, XT, HS
LP, XT, HS
LP, XT, HS
LP, XT, HS
EC, RC
EC, RC
EC, RC
EC, RC
HSPLL
HSPLL
HSPLL
HSPLL
PLL
Preliminary
Modes”). On Reset, HFINTOSC defaults to 1 MHz.
is the PLL Lock-out Timer.
(2)
(1)
(1)
(1)
PIC18(L)F2X/4XK22
T
T
T
OST
OST
OST
Exit Delay
T
T
T
T
T
T
T
T
T
IOBST
IOBST
IOBST
None
CSD
OST
CSD
OST
CSD
OST
CSD
+ t
+ t
+ t
(1)
(3)
PLL
(1)
(4)
PLL
(1)
(3)
PLL
(1)
.
(4)
(4)
(3)
(3)
(3)
Clock Ready Status
Bit (OSCCON)
DS41412D-page 55
OSTS
OSTS
OSTS
OSTS
IOSF
IOSF
IOSF
IOSF